CS4207-DNZ Cirrus Logic Inc, CS4207-DNZ Datasheet - Page 139

• Manufacturer Part Number: CS4207-DNZ
• Description: IC Low Pwr,4/6 HD Aud Codec W/HP Amp
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS4207-DNZ

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 3
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 110
• Voltage - Supply, Analog: 2.97 V ~ 5.25 V
• Voltage - Supply, Digital: 2.97 V ~ 5.25 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Package: 48WQFN
• Number Of Channels Per Chip: 16
• Adc/dac Resolution: 24 Bit
• Gain Control: Programmable
• Number Of Dacs: 3
• Number Of Dac Outputs: 2
• Operating Supply Voltage: 1.8|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1798

DS880F1
8. ANALOG OUTPUT AND FILTERING
The Cirrus Application Note titled Design Notes for a 2-Pole Filter with Differential Input, available as AN48 at
www.cirrus.com, discusses the second-order Butterworth filter and differential-to-single-ended converter that was
implemented on the CS4207 evaluation board.
from the CS4207 are required, the passive output filter shown in
9. PCB LAYOUT CONSIDERATIONS
9.1
Power Supply, Grounding
As with any high-resolution converter, the CS4207 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized.
show the recommended power arrangements, with VA connected to a clean supply. VD, which powers the
digital circuitry, may be run from the system logic supply.
To achieve full analog performance, it is strongly recommended that the following rules be followed:
•
•
Extensive use of power and ground planes, ground plane fill in unused areas and surface mount decoupling
capacitors are recommended. Decoupling capacitors should be as close to the pins of the CS4207 as pos-
sible. The low value ceramic capacitor should be closest to the pin and should be mounted on the same
side of the board as the CS4207 to minimize inductance effects. All signals, especially clocks, should be
ance
place the cap between VBIAS and VA_REF as close to the codec as possible to minimize trace imped-
keep the traces for VA and VA_REF separate as much as possible and only connect them at the supply
LINEOUTx -
LINEOUTx +
CS4207
AGND
Figure 9. Differential to Single-Ended Output Filter
Figure 10. Passive Single-Ended Output Filter
CS4207
22 μF
LINEOUTx +
AGND
22 μF
4.53 kΩ
2.05 kΩ
6800 pF
3300 pF
C0G
C0G
Figure 9
1.05 kΩ
+
2.26 kΩ
4.7 µF
1.5 kΩ
698 Ω
illustrates this implementation. If only single-ended outputs
47.5 k
+
-
562 Ω
Ω
2200 pF
Figure 10
1000 pF
C0G
C0G
Figure 1 on page 11
2700 pF
can be used.
220 Ω
Analog
Output
220 pF
and
Figure 2 on page 12
Analog
Output
CS4207
139