CS4207-DNZ Cirrus Logic Inc, CS4207-DNZ Datasheet - Page 134

• Manufacturer Part Number: CS4207-DNZ
• Description: IC Low Pwr,4/6 HD Aud Codec W/HP Amp
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS4207-DNZ

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 3
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 110
• Voltage - Supply, Analog: 2.97 V ~ 5.25 V
• Voltage - Supply, Digital: 2.97 V ~ 5.25 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Package: 48WQFN
• Number Of Channels Per Chip: 16
• Adc/dac Resolution: 24 Bit
• Gain Control: Programmable
• Number Of Dacs: 3
• Number Of Dac Outputs: 2
• Operating Supply Voltage: 1.8|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1798

134
6.15.6.5 Beep Configuration (CIR = 0004h)
15:5
Bits
1:0
4
3
2
1
0
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read Only
Type
Default
10b
0b
0b
1b
1b
1b
0
DAC1 SZCMode[1:0]: Sets the soft ramp and
zero crossing detection modes by which volume
and muting changes will be implemented.
‘00’b - Immediate Change: When immediate
change is selected, all level changes will take
effect immediately in one step
‘01’b - Zero Cross: Dictates that signal level
changes, both muting and gain/attenuation, will
occur on a signal zero crossing to minimize audi-
ble artifacts. The requested level change will
occur after a timeout period
(approximately???? ms) if the signal does not
encounter a zero crossing. The zero cross func-
tion is independently monitored and imple-
mented for each channel.
‘10’b - Soft Ramp: Allows level changes, both
muting and gain/attenuation, to be implemented
by incrementally ramping, in 1/8 dB steps, from
the current level to the new level at a rate of
1/8 dB per audio sample period.
‘11’b - Soft Ramp on Zero Cross: Dictates that
signal level changes, both muting and gain/atten-
uation, will occur in 1/8 dB steps and be imple-
mented on a signal zero crossing. The 1/8 dB
level change will occur after a timeout period
(approximately??? ms) if the signal does not
encounter a zero crossing. The soft ramp on
zero cross function is independently monitored
and implemented for each channel.
Reserved
DMIC2 Enable: Specifies whether GPIO1 or Dig-
ital Mic Interface 2 is enabled.
‘0’b - GPIO1 enabled, Digital Mic 2 disabled.
‘1’b - Digital Mic 2 enabled, GPIO1 disabled.
DMIC1 Enable: Specifies whether GPIO0 or Dig-
ital Mic Interface 1 is enabled.
‘0’b - GPIO0 enabled, Digital Mic 1 disabled.
‘1’b - Digital Mic 1 enabled, GPIO0 disabled.
DAC3 Beep Enable: This bit allows the output
from the beep generator to be passed to DAC3.
DAC2 Beep Enable: This bit allows the output
from the beep generator to be passed to DAC2.
DAC1 Beep Enable: This bit allows the output
from the beep generator to be passed to DAC1.
Description
CS4207
DS880F1