ADUC7036DCPZ-RL Analog Devices Inc, ADUC7036DCPZ-RL Datasheet - Page 101

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ADUC7036DCPZ-RL

Manufacturer Part Number
ADUC7036DCPZ-RL
Description
SFlash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7036DCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-VFQFN Exposed Pad, CSP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
High Voltage Status Register
Name: HVSTA
Address: Indirectly addressed via the HVCON high voltage interface
Default Value: 0x00
Access: Read only, this register should only be read on a high voltage interrupt
Function: This 8-bit, read only register reflects a change of state for all the corresponding bits in the HVMON register. This register is not
an MMR and does not appear in the MMR memory map. It is accessed through the HVCON registered interface, and data is read back
from this register via HVDAT. In response to a high voltage interrupt event, the high voltage interrupt controller simultaneously and
automatically loads the current value of the high voltage status register (HVSTA) into the HVDAT register.
Table 77. HVSTA Bit Designations
Bit
7 to 6
5
4
3
2
1
0
Description
Reserved. These bits should not be used and are reserved for future use.
PSM status bit. Valid only if enabled via HVCFG0[3]. This bit is not latched and the IRQ needs to be enabled to detect it.
0 = the voltage at the VDD pin stays above 6 V.
1 = the voltage at the VDD pin drops below 6 V.
WU request status bit. Valid only if enabled via HVCFG1[4].
0 = the WU pin has not generated a high voltage interrupt.
1 = a rising or falling edge transition on the WU pin generated a high voltage interrupt (when enabled via HVCFG1[4]).
Overtemperature. This bit is always enabled.
0 = a thermal shutdown event has not occurred.
1 = a thermal shutdown event has occurred. All high voltage (LIN/BSD, WU, and STI) pin drivers are automatically
disabled once a thermal shutdown has occurred.
LIN/BSD short-circuit status flag.
0 = normal LIN/BSD operation. Cleared automatically by reading the HVSTA register.
1 = a LIN/BSD short circuit is detected. In this condition, the LIN driver is automatically disabled.
STI short-circuit status flag.
0 = normal STI driver operation. Cleared automatically by reading the HVSTA register.
1 = the STI driver has experienced a short-circuit condition.
Wake-up short-circuit status flag.
0 = normal wake-up operation.
1 = a wake-up short-circuit is detected.
Rev. C | Page 101 of 132
ADuC7036

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