ADUC7036CCPZ-RL Analog Devices Inc, ADUC7036CCPZ-RL Datasheet - Page 37

• Manufacturer Part Number: ADUC7036CCPZ-RL
• Description: Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7036CCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-VFQFN Exposed Pad, CSP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Address
0x0340
0x0344
0x0348
0x034C
0x0360
0x0364
0x0368
0x036C
0x0380
0x0384
0x0388
0x038C
0x0390
1
Table 22. PLL Base Address = 0xFFFF0400
Address
0x0400
0x0404
0x0408
0x040C
0x0410
0x0414
0x0418
0x042C
0x0440
0x0444
0x0448
0x044C
Updated by kernel.
Name
T2LD
T2VAL
T2CON
T2CLRI
T3LD
T3VAL
T3CON
T3CLRI
T4LD
T4VAL
T4CON
T4CLRI
T4CAP
Name
PLLSTA
POWKEY0
POWCON
POWKEY1
PLLKEY0
PLLCON
PLLKEY1
OSC0TRM
OSC0CON
OSC0STA
0SC0VAL0
OSC0VAL1
1
Byte
4
4
2
1
2
2
2
1
2
2
4
1
2
Byte
1
4
1
4
4
1
4
1
1
1
2
2
Access
Type
RW
R
RW
W
RW
R
RW
W
RW
R
RW
W
R
Access
Type
R
W
RW
W
W
RW
W
RW
RW
R
R
R
Default Value
0x00000000
0xFFFFFFFF
0x0000
N/A
0x0040
0x0040
0x0000
N/A
0x0000
0xFFFF
0x00000000
N/A
0x0000
Default Value
N/A
N/A
0x79
N/A
N/A
0x00
N/A
0xX8
0x00
0x00
0x0000
0x0000
Timer2 load register. See the Timer2—Wake-Up Timer and Timer2 Load
Register sections.
Timer2 value register. See the Timer2—Wake-Up Timer and Timer2 Value
Register sections.
Timer2 control MMR. See the Timer2—Wake-Up Timer and Timer2 Control
Register sections and Table 55.
Timer2 interrupt clear register. See the Timer2—Wake-Up Timer and Timer2
Clear Register sections.
Timer3 load register. See the Timer3—Watchdog Timer and Timer3 Load
Register sections.
Timer3 value register. See the Timer3—Watchdog Timer and Timer3 Value
Register sections.
Timer3 control MMR. See the Timer3—Watchdog Timer, Timer3 Value Register,
and Timer 3 Control Register sections and Table 56.
Timer3 interrupt clear register. See the Timer3—Watchdog Timer and Timer3
Clear Register sections.
Timer4 load register. See the Timer4—STI Timer and Timer4 Load Register
sections.
Timer4 value register. See the Timer4—STI Timer and Timer4 Value Register
sections.
Timer4 control MMR. See the Timer4—STI Timer and Timer4 Control Register
sections and Table 57.
Timer4 interrupt clear register. See the Timer4—STI Timer and Timer4 Clear
Register sections.
Timer4 capture register. See the Timer4—STI Timer section.
Description
PLL status MMR. See the PLLSTA Register section and Table 44.
POWCON prewrite key. See the POWCON Prewrite Key section.
Power control and core speed control register. See the POWCON Register section.
POWCON postwrite key. See the POWCON Postwrite Key section.
PLLCON prewrite key. See the PLLCON Prewrite Key section.
PLL clock source selection MMR. See the PLLCON Register section.
PLLCON postwrite key. See the PLLCON Postwrite Key section.
Low power oscillator trim bits MMR. See the OSC0TRM Register section.
Low power oscillator calibration control MMR. See the OSC0CON Register section.
Low power oscillator calibration status MMR. See the OSC0STA Register section.
Low power oscillator calibration Counter 0 MMR. See the OSC0VAL0 Register
section.
Low power oscillator calibration Counter 1 MMR. See the OSC0VAL1 Register
section.
Description
Rev. C | Page 37 of 132
ADuC7036