ADUC7036CCPZ-RL Analog Devices Inc, ADUC7036CCPZ-RL Datasheet - Page 3
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ADUC7036CCPZ-RL
Manufacturer Part Number
ADUC7036CCPZ-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.EVAL-ADUC7036QSPZ.pdf
(132 pages)
Specifications of ADUC7036CCPZ-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-VFQFN Exposed Pad, CSP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 3 of 132
- Download datasheet (2Mb)
REVISION HISTORY
2/11—Rev. B to Rev. C
Changes to I
Changes to On-Chip Kernel Section ............................................32
Added Figure 16; Renumbered Sequentially ...............................34
Changes to Table 100 ....................................................................130
Changes to Ordering Guide.........................................................132
4/10—Rev. A to Rev. B
Changes to Table 6 ..........................................................................15
Changes to Timers Section ............................................................70
7/09—Rev. 0 to Rev. A
Changes to Features Section ............................................................1
Changes to Figure 1...........................................................................1
Changes to Table 1 ....................................................................4, 8, 9
Changes to Table 3 ..........................................................................11
Changes to Table 4 ..........................................................................12
Changes to Table 5 ..........................................................................13
DD
(MCU Normal Mode) Parameter, Table 1 ..........9
Rev. C | Page 3 of 132
Changes to Figure 8, Figure 9, and Figure 10..............................18
Changes to Theory of Operation Section ....................................20
Changes to Flash/EE Memory Reliability Section......................31
Changes to Table 46 ........................................................................64
Changes to Normal Interrupt (IRQ) Request Section ...............68
Changes to Timer0—Liftime Timer Section...............................71
Changes to Timer1 Section............................................................73
Changes to Timer2—Wake-Up Timer Section ...........................75
Changes to Timer3 Interface Section ...........................................77
Changes to Timer4—STI Timer Section .....................................79
Changes to BSD Communication Frame Section.....................123
Changes to Table 97 ......................................................................125
Changes to Figure 57 ....................................................................128
Changes to Ordering Guide.........................................................129
10/08—Revision 0: Initial Version
ADuC7036
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