ADUC7036CCPZ-RL Analog Devices Inc, ADUC7036CCPZ-RL Datasheet - Page 29

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ADUC7036CCPZ-RL

Manufacturer Part Number
ADUC7036CCPZ-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7036CCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-VFQFN Exposed Pad, CSP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
FLASH/EE MEMORY SECURITY
The 94 kB of Flash/EE memory available to the user can be read
and write protected using the FFE0HID and FEE1HID registers.
In Block 0, the FEE0HID MMR protects the 30 kB. Bits[0:28] of
this register protect Page 0 to Page 57 from writing. Each bit
protects two pages, that is, 1 kB. Bits[29:30] protect Page 58 and
Page 59, respectively; that is, each bit write protects a single page
of 512 bytes. The MSB of this register (Bit 31) protects Block 0
from being read via JTAG.
The FEE0PRO register mirrors the bit definitions of the FEE0HID
MMR. The FEE0PRO MMR allows user code to lock the protect-
tion or security configuration of the Flash/EE memory so that the
protection configuration is automatically loaded on subsequent
power-on or reset events. This flexibility allows the user to set
and test protection settings temporarily using the FEE0HID
MMR and, subsequently, lock the required protection configu-
ration (using FEE0PRO) when shipping protection systems into
the field.
In Block 1 (64 kB), the FEE1HID MMR protects the 64 kB.
Bits[0:29] of this register protect Page 0 to Page 119 from writing.
Each bit protects four pages, that is, 2 kB. Bit 30 protects Page 120
to Page 127; that is, Bit 30 write protects eight pages of 512 bytes.
The MSB of this register (Bit 31) protects Flash/EE Block 1 from
being read via JTAG.
As with Block 0, the FEE1PRO register mirrors the bit definitions
of the FEE1HID MMR. The FEE1PRO MMR allows user code
to lock the protection or security configuration of the Flash/EE
memory so that the protection configuration is automatically
loaded on subsequent power-on or reset events.
There are three levels of protection: temporary protection,
keyed permanent protection, and permanent protection.
Int a = FEExSTA;
FEExPRO =0 xFFFFFFFB;
FEExADR = 0x66BB;
FEExDAT = 0xAA55;
FEExMOD = 0x0048
FEExCON = 0x0C;
while (FEExSTA & 0x04){}
//Ensure FEExSTA is cleared
//Protect Page 4 and Page 5
//32-bit key value (Bits[31:16])
//32-bit key value (Bits[15:0])
//Lock security sequence
//Write key command
//Wait for command to finish
Rev. C | Page 29 of 132
Temporary Protection
Temporary protection can be set and removed by writing
directly into the FEExHID MMR. This register is volatile and,
therefore, protection is in place only while the part remains
powered on. This protection is not reloaded after a power cycle.
Keyed Permanent Protection
Keyed permanent protection can be set via FEExPRO, which is
used to lock the protection configuration. The software key
used at the start of the required FEExPRO write sequence is
saved once and must be used for any subsequent access of the
FEExHID or FEExPRO MMRs. A mass erase sets the key back
to 0xFFFF but also erases the entire user code space.
Permanent Protection
Permanent protection can be set via FEExPRO, in a manner
similar to the way keyed permanent protection is set, with the
only difference being that the software key used is 0xDEADDEAD.
When the FEExPRO write sequence is saved, only a mass erase
sets the key back to 0xFFFFFFFF. The mass erase also erases the
entire user code space.
Sequence to Write the Key and Set Permanent Protection
1.
2.
3.
4.
To remove or modify the protection, the same sequence can be
used with a modified value of FEExPRO.
The previous sequence for writing the key and setting permanent
protection is illustrated in the following example sequence,
which protects writing Page 4 and Page 5 of the Flash/EE.
Write FEExPRO corresponding to the pages to be
protected.
Write the new (user-defined) 32-bit key in FEExADR,
Bits[31:16] and FEExDAT, Bits[15:0].
Write Bits[6:5] = 0x10 in FEExMOD.
Run the write key command (Code 0x0C) in FEExCON.
ADuC7036

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