ADUC7023BCP6Z62IRL Analog Devices Inc, ADUC7023BCP6Z62IRL Datasheet - Page 52

• Manufacturer Part Number: ADUC7023BCP6Z62IRL
• Description: Flash ARM7+8-ch,12-B ADC & 4x12-B DAC IC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7023BCP6Z62IRL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 44MHz
• Connectivity: I²C, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 62KB (62K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12 x12b; D/A 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7023
Bit
10 to 9
8
7
6 to 5
4
3
2 to 1
0
1
GP0DAT Register
Name
GP0DAT
GP1DAT
GP2DAT
GPxDAT are Port x configuration and data registers. They
configure the direction of the GPIO pins of Port x, set the output
value for the pins configured as output, and store the input value
of the pins configured as input.
Table 59. GPxDAT MMR Bit Descriptions
Bit
31 to 24
23 to 16
15 to 8
7 to 0
GP0SET Register
Name:
Address:
Default value:
Access:
Function:
GP1SET Register
Name:
Address:
Default value:
Access:
Function:
When P2.0 is configured as AIN12, the internal pull-up resistor cannot be
disabled.
R(b00)
R/W
Reserved
R(b00)
R/W
Reserved
R(b00)
R/W
Description
Direction of the data.
This bit is set to 1 by the user to configure the GPIO
pin as an output.
This bit is cleared to 0 by the user to configure the
GPIO pin as an input.
Port x data output.
Reflect the state of port x pins at reset (read only).
Port x data input (read only).
Address
0xFFFFF420
0xFFFFF430
0xFFFFF440
GP0PAR
GP0SET
0xFFFFF424
0x000000XX
Write
GP0SET is a data set Port x register.
R(b00)
R/W
Reserved
R(b00)
R/W
Reserved
R(b00)
R/W
0x000000XX
0x000000XX
0x000000XX
Default Value
GP1PAR
GP1SET
0xFFFFF434
0x000000XX
Write
GP1SET is a data set Port x
register.
R(b00)
R/W
Reserved
Reserved
Reserved
Reserved
R(b00)
R(b0)
GP2PAR
Access
R/W
R/W
R/W
Rev. B | Page 52 of 96
GP2SET Register
Name:
Address:
Default value:
Access:
Function:
Table 60. GPxSET MMR Bit Descriptions
Bit
31 to 24
23 to 16
15 to 0
GP0CLR Registers
Name:
Address:
Default value:
Access:
Function:
GP1CLR Registers
Name:
Address:
Default value:
Access:
Function:
GP2CLR Registers
Name:
Address:
Default value:
Access:
Function:
Description
Reserved.
Data port x.
This bit is set to 1 by the user to set bit on Port x; this
bit also sets the corresponding bit in the GPxDAT
MMR.
This bit is cleared to 0 by the user; this bit does not
affect the data out.
Reserved.
GP0CLR
0xFFFFF428
0x000000XX
Write
GP0CLR is a data clear Port x register.
GP1CLR
0xFFFFF438
0x000000XX
Write
GP1CLR is a data clear Port x register.
GP2CLR
0xFFFFF448
0x000000XX
Write
GP2CLR is a data clear Port x register.
GP2SET
0xFFFFF444
0x000000XX
Write
GP2SET is a data set Port x
register.