AD9887AKSZ-140 Analog Devices Inc, AD9887AKSZ-140 Datasheet - Page 40

IC,TV/VIDEO CIRCUIT,Video Digitizer,CMOS,QFP,160PIN,PLASTIC

AD9887AKSZ-140

Manufacturer Part Number
AD9887AKSZ-140
Description
IC,TV/VIDEO CIRCUIT,Video Digitizer,CMOS,QFP,160PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9887AKSZ-140

Applications
Graphic Cards, VGA Interfaces
Interface
Analog and Digital
Voltage - Supply
3.15 V ~ 3.45 V
Package / Case
160-MQFP, 160-PQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD9887A
SYNC Detection/Active Interface Control
0x11 7
Table 30. Analog Interface HSYNC Detection Results
Detect
0
1
0x11 6
Table 31. Analog Interface Sync-on-Green Detection Results
Detect
0
1
0x11 5
Table 32. Analog Interface VSYNC Detection Results
Detect
0
1
0x11 4
Table 33. Digital Interface Clock Detection Results
Detect
0
1
This bit is used to indicate when activity is detected on
the HSYNC input pin (Pin 82). If HSYNC is held high or
low, activity is not detected.
Figure 43 shows where this function is implemented.
This bit is used to indicate when sync activity is detected
on the sync-on-green input pin (Pin 108).
Figure 43 shows where this function is implemented.
Warning: Even if no sync is present on the green video
input, normal video might trigger activity.
This bit indicates when activity is detected on the
VSYNC input pin (Pin 81). If VSYNC is held high or
low, activity is not detected.
Figure 43 shows where this function is implemented.
This indicates when activity is detected on the digital
interface clock input. Because this register is unreliable
in certain applications, an external DVI clock detect
shown in Figure 28 is recommended.
Figure 43 shows where this function is implemented.
Analog Interface HSYNC Detect
Analog Interface Sync-on-Green Detect
Analog Interface VSYNC Detect
Digital Interface Clock Detect
Function
No activity detected
Activity detected
Function
No activity detected
Activity detected
Function
No activity detected
Activity detected
Function
No activity detected
Activity detected
Rev. B | Page 40 of 52
0x11 3
Table 34. Active Interface Results
Bits 7, 6, or 5
(Analog
Detection)
0
0
1
1
X
1
2
3
0x11 2
Table 35. Active Hsync Results
Bit 7
(HSYNC Detect)
0
0
1
1
X
1
2
3
The override bit is Bit 7 in Register 0x12.
AI = 0 means analog interface.
AI = 1 means digital interface.
The override bit is Bit 5 in Register 0x12.
AHS = 0 means HSYNC input.
AHS = 1 means SOG input.
This bit indicates which interface should be active,
analog or digital. It checks for activity on the analog and
digital interfaces, then determines which should be
active according to the conditions outlined in Table 34.
Specifically, analog interface detection is determined by
OR’ing Bit 7, Bit 6, and Bit 5 from this register.
Digital interface detection is determined by Bit 4 in this
register. If both interfaces are detected, the user can deter-
mine which has priority via Bit 6 in Register 0x12. The
user can override this function via Bit 7 in Register 0x12.
If the override bit is set to Logic 1, this bit is forced to the
set state of Bit 6 in Register 0x12.
This bit determines which Hsync to use for the analog
interface, the HSYNC input or the sync-on-green. It uses
Bit 7 and Bit 6 in this register for inputs when determining
which should be active. Similar to the previous bit, if both
Hsync and sync-on-green are detected, the user can deter-
mine which has priority via Bit 4 in Register 0x12. The
user can override this function via Bit 5 in Register 0x12.
If the override bit is set to Logic 1, this bit is forced to the
set state of Bit 4 in Register 0x12.
Active Interface (AI)
Active Hsync (AHS)
Bit 4
(Digital
Detection)
0
1
0
1
X
Bit 6
0
1
0
1
X
(SOG Detect)
Override
0
0
0
0
1
Override
0
0
0
0
1
1
AI
Soft power-down
(seek mode)
1
0
Bit 6 in Register 0x12
Bit 6 in Register 0x12
2, 3
1
AHS
Bit 4 in
Register 0x12
1
0
Bit 4 in
Register 0x12
Bit 4 in
Register 0x12
2, 3

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