AD9887AKSZ-140 Analog Devices Inc, AD9887AKSZ-140 Datasheet - Page 16

IC,TV/VIDEO CIRCUIT,Video Digitizer,CMOS,QFP,160PIN,PLASTIC

AD9887AKSZ-140

Manufacturer Part Number
AD9887AKSZ-140
Description
IC,TV/VIDEO CIRCUIT,Video Digitizer,CMOS,QFP,160PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9887AKSZ-140

Applications
Graphic Cards, VGA Interfaces
Interface
Analog and Digital
Voltage - Supply
3.15 V ~ 3.45 V
Package / Case
160-MQFP, 160-PQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD9887A
PIN FUNCTION DETAILS—DIGITAL INTERFACE
Digital Video Data Inputs
Rx0+
Rx0−
Rx1+
Rx1−
Rx2+
Rx2−
Digital Video Clock Inputs
RxC+
RxC−
Termination Control
R
TERM
Digital Differential Input Channel 0 True
Digital Differential Input Channel 0 Complement
Digital Differential Input Channel 1 True
Digital Differential Input Channel 1 Complement
Digital Differential Input Channel 2 True
Digital Differential Input Channel 2 Complement
Digital Differential Data Clock True
Digital Differential Data Clock Complement
These pins receive the differential, low voltage,
swing input pixel clock from a digital graphics
transmitter.
Internal Termination Set Pin
This pin is used to set the termination resistance for
all digital interface high speed inputs. To set this pin,
place a resistor of 10 times the desired input termi-
nation resistance between this pin (Pin 53) and the
ground supply. Typically, the value of this resistor
should be 500 Ω.
These pins receive three pairs of differential, low
voltage, swing input pixel data from a digital
graphics transmitter.
Rev. B | Page 16 of 52
Data Enable
DE
HDCP
DDCSCL HDCP Slave Serial Port Data Clock
DDCSDA HDCP Slave Serial Port Data I/O
MCL
MDA
CTL
Data Enable
This pin outputs the state of data enable (DE). The
AD9887A decodes DE from the incoming stream of
data. The DE signal is high during active video and
low when there is no active video.
For use in communicating with the HDCP-enabled
DVI transmitter.
For use in communicating with the HDCP-enabled
DVI transmitter.
HDCP Master Serial Port Data Clock
Connects the EEPROM for reading the encrypted
HDCP keys.
HDCP Master Serial Port Data I/O
Connects the EEPROM for reading the encrypted
HDCP keys.
Digital Control Outputs
These pins output the control signals for the red and
green channels. CTL0 and CTL1 correspond to the
red channel input, and CTL2 and CTL3 correspond
to the green channel input.

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