AD8197AASTZ-RL Analog Devices Inc, AD8197AASTZ-RL Datasheet - Page 16

IC,Telecom Switching Circuit,QFP,100PIN,PLASTIC

AD8197AASTZ-RL

Manufacturer Part Number
AD8197AASTZ-RL
Description
IC,Telecom Switching Circuit,QFP,100PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8197AASTZ-RL

Function
Switch
Circuit
1 x 4:1
On-state Resistance
50 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
3 V ~ 3.6 V
Current - Supply
40mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8197AASTZ-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
AD8197A
READ PROCEDURE
To read data from the AD8197A register set, an I
(such as a microcontroller) needs to send the appropriate
control signals to the AD8197A slave device. The signals are
controlled by the I
diagram of the procedure, see Figure 30. The steps for a read
procedure are as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Wait for the AD8197A to acknowledge the request.
11. The AD8197A serially transfers the data (eight bits) held in
12. Acknowledge the data from the AD8197A.
GENERAL CASE
Send a start condition (while holding the I2C_SCL line
high, pull the I2C_SDA line low).
Send the AD8197A part address (seven bits). The upper
four bits of the AD8197A part address are the static value
[1001] and the three LSBs are set by Input Pin I2C_ADDR2,
Input Pin I2C_ADDR1, and Input Pin I2C_ADDR0 (LSB).
This transfer should be MSB first.
Send the write indicator bit (0).
Wait for the AD8197A to acknowledge the request.
Send the register address (eight bits) from which data is to
be read. This transfer should be MSB first.
Wait for the AD8197A to acknowledge the request.
Send a repeated start condition (Sr) by holding the
I2C_SCL line high and pulling the I2C_SDA line low.
Resend the AD8197A part address (seven bits) from Step 2.
The upper four bits of the AD8197A part address are the
static value [1001] and the three LSBs are set by
the Input Pin I2C_ADDR2, I2C_ADDR1 and Input
Pin I2C_ADDR0 (LSB). This transfer should be MSB first.
Send the read indicator bit (1).
the register indicated by the address set in Step 5. This data
is sent MSB first.
EXAMPLE
I2C_SDA
I2C_SDA
I2C_SCL
START
1
2
C master, unless otherwise specified. For a
FIXED PART
2
ADDR
ADDR
R/W
3
ACK
4
5
2
C master
REGISTER ADDR
Figure 30. I
Rev. 0 | Page 16 of 28
2
C Read Diagram
ACK
6
7
SR
13. Perform one of the following:
SWITCHING/UPDATE DELAY
There is a delay between when a user writes to the configura-
tion registers of the AD8197A and when that state change takes
physical effect. This update delay occurs regardless of whether
the user programs the AD8197A via the serial or the parallel
control interface. When using the serial control interface, the
update delay begins at the falling edge of I2C_SCL for the last
data bit transferred, as shown in Figure 29. When using the
parallel control interface, the update delay begins at the transition
edge of the relevant parallel interface pin. This update delay is
register specific and the times are specified in Table 1.
During a delay window, new values can be written to the
configuration registers, but the AD8197A does not physically
update until the end of that register’s delay window. Writing
new values during the delay window does not reset the window;
new values supersede the previously written values. At the end
of the delay window, the AD8197A physically assumes the state
indicated by the last set of values written to the configuration
registers. If the configuration registers are written after the delay
window ends, the AD8197A immediately updates and a new
delay window begins.
FIXED PART
13a. Send a stop condition (while holding the I2C_SCL
13b. Send a repeated start condition (while holding the
13c. Send a repeated start condition (while holding the
13d. Send a repeated start condition (while holding the
8
ADDR
line high, pull the SDA line high) and release control
of the bus to end the transaction (shown in Figure 30).
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 2 of the write procedure (previous
Write Procedure section) to perform a write.
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 2 of this procedure to perform a
read from another address.
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 8 of this procedure to perform a
read from the same address.
ADDR
R/W
9 10 11
ACK
DATA
ACK
12
STOP
13

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