5M2210ZF256C5N Altera, 5M2210ZF256C5N Datasheet - Page 65

• Manufacturer Part Number: 5M2210ZF256C5N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX Vr

Specifications of 5M2210ZF256C5N

• Cpld Type: FLASH
• No. Of Macrocells: 1700
• No. Of I/o's: 271
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 4.6ns
• Frequency: 201.1MHz
• Supply Voltage Range: 1.71V To 1.89V
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.0ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 2210
• Number Of Macrocells: 1700
• Number Of Gates: -
• Number Of I /o: 203
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-LBGA
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Vendor undefined / RoHS Compliant

Product and Vendor Name
MAX II/MAX IIZ Development Kit
System Level Solutions
MAX V CPLD Development Kit
Altera
CoreCommander Development Kit
System Level Solutions
Cyclone III LS FPGA Development Kit
Altera
DB Start 3C10
EBV Elektronik GmbH & Co. KG
DB1270-144
EBV Elektronik GmbH & Co. KG
HSMC Prototyping Board
Bitec
EP3CLS200F780C7N
EP3C10E144C8N
DB1270T144C5N
MAX V 5M570Z
EP3C25F256C8
Daughtercard
Cyclone III LS
Cyclone III
Cyclone III
EPM240Z
EPM240
Device
MAX II
MAX II
Description
This board provides a hardware platform for designing and
developing simple and low-end systems based on Altera MAX II/
MAX IIZ devices. The board features a MAX II/MAX IIZ
EPM240T100Cx/EPM240ZM100Cx device with 240 LEs and 8,192 bits
of user flash memory (UFM). The board also supports vertical
migration into EPM570T100Cx devices with 570 LEs and 8,192 bits
of UFM.
Altera’s MAX V CPLD Development Kit is a low-cost platform to help
you quickly begin developing low-cost, low-power CPLD designs. Use
the kit as a standalone board or combined with a wide variety of
daughtercards that are available from third parties.
This kit features the Altera Cyclone III FPGA that provides more than
enough room for almost any embedded design. This flexible board
comes with a suite of SLS IP Cores, drivers, and application software.
Delivered as a complete package, this kit ensures quick and easy
implementation of industry-leading cores with reduced risk, at a very
low cost.
This kit combines a high-density, low-power Cyclone III LS FPGA with
a complete suite of security features implemented at the silicon,
software, and IP levels. These security features provide passive and
active protection of your IP from tampering, reverse engineering, and
counterfeiting. It uses the EP3CLS200 FPGA–200K LEs at less than
1/4 W static power.
This starter kit is ideal for starting your first experiments based on
Cyclone III FPGAs. It is designed for ease of use, with embedded
USB-Blaster cable and pin header for peripherals. It can be powered
via USB, and it features a Linux BSP, a PCI solution for high data
throughput, a local bus solution for low-latency data transmission
including a local bus IP core, and several industry-standard interfaces
such as CAN and RS485.
This kit enables you to evaluate the MAX II feature set or begin
prototyping a design prior to receiving custom hardware. It includes
all software, cables, and accessories needed to ensure an easy and
productive evaluation of the MAX II CPLD. It includes the
MAX II EPM1270T144C5ES CPLD, eight LEDs, four push buttons, a
7-segment display, serial I/O connectors (RS-232 DB9 port), and an
8-bit DIP switch.
This board provides a solution for prototyping circuits and testing
them together with the latest Altera FPGA development kits. The
board provides access to the complete set of HSMC signals via a
footprint of standard 0.1” pitch headers. The HSMC power pins are
accessed via fuses for added security. The main prototype matrix
comprises a 0.1” grid interleaved with +3.3-V and GND access points.
Footprints for commonly used 25-way and 9-way D-type connectors
are included on the board.
Altera and Partner Development Kits
Altera Product Catalog
•
2011
Development Kits
•
www.altera.com
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