SMAX-624CG-ACTEL Actel, SMAX-624CG-ACTEL Datasheet - Page 35

• Manufacturer Part Number: SMAX-624CG-ACTEL
• Description: Programming Socket Adapters & Emulators SILICON SCULPTOR ADAPTER MODULE
• Manufacturer: Actel

Specifications of SMAX-624CG-ACTEL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A54SX32 Timing Characteristics
Table 1-20 • A54SX32 Timing Characteristics
Parameter
C-Cell Propagation Delays
t
Predicted Routing Delays
t
t
t
t
t
t
t
t
R-Cell Timing
t
t
t
t
t
t
Input Module Propagation Delays
t
t
Predicted Input Routing Delays
t
t
t
t
t
t
Note:
1. For dual-module macros, use t
2. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for estimating
3. Delays based on 35 pF loading, except t
PD
DC
FC
RD1
RD2
RD3
RD4
RD8
RD12
RCO
CLR
PRESET
SUD
HD
WASYN
INYH
INYL
IRD1
IRD2
IRD3
IRD4
IRD8
IRD12
device performance. Post-route timing analysis or simulation is required to determine actual worst-case performance. Post-route
timing is based on actual routing delay measurements performed on the device prior to shipment.
(Worst-Case Commercial Conditions, V
Description
Internal Array Module
FO = 1 Routing Delay, Direct Connect
FO = 1 Routing Delay, Fast Connect
FO = 1 Routing Delay
FO = 2 Routing Delay
FO = 3 Routing Delay
FO = 4 Routing Delay
FO = 8 Routing Delay
FO = 12 Routing Delay
Sequential Clock-to-Q
Asynchronous Clear-to-Q
Asynchronous Preset-to-Q
Flip-Flop Data Input Set-Up
Flip-Flop Data Input Hold
Asynchronous Pulse Width
Input Data Pad-to-Y HIGH
Input Data Pad-to-Y LOW
FO = 1 Routing Delay
FO = 2 Routing Delay
FO = 3 Routing Delay
FO = 4 Routing Delay
FO = 8 Routing Delay
FO = 12 Routing Delay
2
1
PD
+ t
2
RD1
ENZL
+ t
PDn
and t
, t
RCO
ENZH
+ t
CCR
. For t
RD1
Min.
= 4.75 V, V
'–3' Speed
0.5
0.0
1.4
+ t
ENZL
v3.2
PDn,
Max.
and t
0.6
0.1
0.3
0.3
0.7
1.0
1.4
2.7
4.0
0.8
0.5
0.7
1.5
1.5
0.3
0.7
1.0
1.4
2.7
4.0
or t
CCA
ENZH
PD1
,V
Min.
CCI
'–2' Speed
0.6
0.0
1.6
+ t
the loading is 5 pF.
RD1
= 3.0 V, T
+ t
Max.
0.7
0.1
0.4
0.4
0.8
1.2
1.6
3.1
4.7
1.1
0.6
0.8
1.7
1.7
0.4
0.8
1.2
1.6
3.1
4.7
SUD
, whichever is appropriate.
J
= 70°C)
Min.
'–1' Speed
0.7
0.0
1.8
Max.
0.8
0.1
0.4
0.4
0.9
1.4
1.8
3.5
5.3
1.3
0.7
0.9
1.9
1.9
0.4
0.9
1.4
1.8
3.5
5.3
Min.
'Std' Speed
0.8
0.0
2.1
SX Family FPGAs
Max.
0.9
0.1
0.5
0.5
1.0
1.6
2.1
4.1
6.2
1.4
0.8
1.0
2.2
2.2
0.5
1.0
1.6
2.1
4.1
6.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1-31