SMAX-624CG-ACTEL Actel, SMAX-624CG-ACTEL Datasheet - Page 14

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SMAX-624CG-ACTEL

Manufacturer Part Number
SMAX-624CG-ACTEL
Description
Programming Socket Adapters & Emulators SILICON SCULPTOR ADAPTER MODULE
Manufacturer
Actel

Specifications of SMAX-624CG-ACTEL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
A54SX16P AC Specifications for (PCI Operation)
Table 1-7 •
1 -1 0
Symbol
I
I
I
slew
slew
Notes:
1. Refer to the V/I curves in
2. Note that this segment of the minimum current curve is drawn from the AC drive point directly to the DC drive point rather than
3. Maximum current requirements must be met as drivers pull beyond the last step voltage. Equations defining these maximums (A
4. This parameter is to be interpreted as the cumulative edge rate across the specified range, rather than the instantaneous rate at any
OH(AC)
OL(AC)
CL
SX Family FPGAs
of that specified here; i.e., half-size output drivers may be used on these signals. This specification does not apply to CLK and RST#,
which are system outputs. “Switching Current High” specifications are not relevant to SERR#, INTA#, INTB#, INTC#, and INTD#,
which are open drain outputs.
toward the voltage rail (as is done in the pull-down curve). This difference is intended to allow for an optional N-channel pull-up.
and B) are provided with the respective diagrams in
design. In order to facilitate component testing, a maximum current test point is defined for each side of the output driver.
point within the transition range. The specified load (diagram below) is optional; i.e., the designer may elect to meet this parameter
with an unloaded output per revision 2.0 of the PCI Local Bus Specification. However, adherence to both maximum and minimum
parameters is now required (the maximum is no longer simply a guideline). Since adherence to the maximum slew rate was not
required prior to revision 2.1 of the specification, there may be components in the market for some time that have faster edge rates;
therefore, motherboard designers must bear in mind that rise and fall times faster than this specification could occur, and should
ensure that signal integrity modeling accounts for this. Rise slew rate does not apply to open drain outputs.
R
F
Parameter
Switching Current High
(Test Point)
Switching Current High
(Test Point)
Low Clamp Current
Output Rise Slew Rate
Output Fall Slew Rate
A54SX16P AC Specifications for (PCI Operation)
Figure 1-9 on page
Output
Buffer
Condition
0 < V
1.4 ≤ V
3.1 < V
V
V
2.2 > V
V
–5 < V
0.4 V to 2.4 V load
2.4 V to 0.4 V load
0.71 > V
OUT
OUT
OUT
1-11. Switching current characteristics for REQ# and GNT# are permitted to be one half
OUT
= 3.1
≥ 2.2
= 0.71
IN
OUT
OUT
OUT
≤ –1
OUT
Pin
≤ 1.4
1 kΩ
1
3
< 2.4
< V
> 0.55
3
> 0
Figure 1-9 on page
1
CC
1, 2
1, 3
1, 3
1
4
4
v3.2
1/2 in. max.
10 pF
–44 + (V
–25 + (V
V
1-11. The equation defined maxima should be met by
OUT
OUT
Min.
IN
–44
95
/0.023
1
1
+ 1) /0.015
1 kΩ
– 1.4)/0.024
V
CC
EQ 1-2 on page 1-11
EQ 1-1 on page 1-11
Max.
–142
206
5
5
Units
V/ns
V/ns
mA
mA
mA
mA
mA
mA
mA

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