SMAX-624CG-ACTEL Actel, SMAX-624CG-ACTEL Datasheet - Page 21

• Manufacturer Part Number: SMAX-624CG-ACTEL
• Description: Programming Socket Adapters & Emulators SILICON SCULPTOR ADAPTER MODULE
• Manufacturer: Actel

Specifications of SMAX-624CG-ACTEL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1-13
devices.
Table 1-13 • Capacitance Values for Devices
Table 1-14 • Power Consumption Guidelines
Follow the steps below to estimate power consumption.
The values provided for the sample calculation below are
for the shift register design above. This method for
estimating power consumption is conservative and the
actual power consumption of your design may be less
than the estimated power consumption.
The total power dissipation for the SX family is the sum
of the AC power dissipation and the DC power
dissipation.
C
C
C
C
C
C
r
r
Description
Logic Modules (m)
Inputs Switching (n)
Outputs Switching (p)
First Routed Array Clock Loads (q
Second Routed Array Clock Loads (q
Load Capacitance (C
Average Logic Module Switching Rate (f
Average Input Switching Rate (f
Average Output Switching Rate (f
Average First Routed Array Clock Rate (f
Average Second Routed Array Clock Rate (f
Average Dedicated Array Clock Rate (f
Dedicated Clock Array Clock Loads (s
1
2
EQM
EQI
EQO
EQCR
EQHV
EQHF
(pF)
(pF)
P
Total
(pF)
(pF)
(pF)
(pF)
= P
AC
shows
A54SX08
(dynamic power) + P
0.615
4.0
3.4
4.7
1.6
60
87
87
L
capacitance
)
A54SX16
0.615
138
138
4.0
3.4
4.7
1.6
96
n
DC
1
)
p
)
A54SX16P A54SX32
)
values
(static power)
2
1
)
0.615
)
138
138
4.0
3.4
4.7
1.6
s1
96
)
m
q1
)
)
q2
for
)
0.615
various
140
171
171
4.0
3.4
4.7
1.6
EQ 1-9
v3.2
Guidelines for Calculating Power
Consumption
The power consumption guidelines are meant to
represent worst-case scenarios so that they can be
generally used to predict the upper limits of power
dissipation. These guidelines are shown in
Sample Power Calculation
One of the designs used to characterize the SX family
was a 528 bit serial-in, serial-out shift register. The design
utilized 100 percent of the dedicated flip-flops of an
A54SX16P device. A pattern of 0101… was clocked into
the device at frequencies ranging from 1 MHz to
200 MHz. Shifting in a series of 0101… caused 50 percent
of the flip-flops to toggle from low to high at every clock
cycle.
AC Power Dissipation
P
P
P
(n × C
(0.5 (q
(0.5 (q
(0.5 (s
AC
AC
Output Buffer
= P
= V
EQI
1
1
2
Module
CCA
× C
× C
× C
× f
20% of modules
# inputs/4
# outputs/4
20% of register cells
20% of register cells
35 pF
f/10
f/5
f/10
f/2
f/2
f
20% of regular modules
2
EQHV
n
EQCR
EQCR
)
+ P
× [(m × C
Input Buffer
+ P
Input Buffer
Power Consumption Guideline
× f
× f
× f
RCLKA Net
s1
q1
q2
) + (C
) + (r
)+ (r
+ (p × (C
EQM
2
1
+ P
EQHF
× f
× f
× f
RCLKB Net
m
q2
EQO
q1
)
× f
Module
))
))
RCLKB
RCLKA
s1
+ C
))
HCLK
L
+
+ P
) × f
+
SX Family FPGAs
+
]
HCLK Net
Table
p
)
Output Buffer
1-14.
EQ 1-10
EQ 1-11
+
1-17
+