IPR-RLDRAMII Altera, IPR-RLDRAMII Datasheet - Page 19
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IPR-RLDRAMII
Manufacturer Part Number
IPR-RLDRAMII
Description
IP CORE Renewal Of IP-RLDRAMII
Manufacturer
Altera
Series
Memory Controllers - SDRAMr
Type
MegaCorer
Specifications of IPR-RLDRAMII
Software Application
IP CORE, Memory Controllers, SDRAM
Tool Function
Intellectual Property (IP) Core
Supported Devices
HardCopy, Stratix
Function
RLDRAM II Controller
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Figure 2–6. Example Datapath
Altera Corporation
November 2009
control_rdata[35:18]
control_rdata[71:54]
control_rdata[53:36]
control_rdata[17:0]
control_qvld[1]
control_qvld[0]
capture_clk[1]
capture_clk[0]
Figure 2–6
interface configurations:
■
Registers
Registers
Registers
Registers
Registers
Registers
Optional
Optional
Optional
Optional
Optional
Optional
Pipeline
Pipeline
Pipeline
Pipeline
Pipeline
Pipeline
Each DQS rldramii_dq[] byte group is captured by the delayed
version of its associated rldramii_qk[] data strobe:
shows the following points, which are applicable for all
MegaCore Version 9.1
Datapath
RLDRAM II Controller MegaCore Function User Guide
DQS Group 3
DQS Group 2
DQS Group 1
DQS Group 0
Group 1
Group 0
Read
Read
QVLD
Read
Read
QVLD
Logic
Logic
Logic
Logic
Data
Data
Data
Data
rldramii_dq[35:27]
rldramii_dq[26:18]
rldramii_dq[17:9]
rldramii_dq[8:0]
rldramii_qvld[1]
rldramii_qvld[0]
rldramii_qk[3]
rldramii_qk[2]
rldramii_qk[1]
rldramii_qk[0]
Functional Description
RLDRAM II
RLDRAM II
Device 1
Device 0
2–9