990XCP98000 SQUARE D, 990XCP98000 Datasheet - Page 208

• Manufacturer Part Number: 990XCP98000
• Description: QUANTUM CPU BATTERY FOR S
• Manufacturer: SQUARE D

Specifications of 990XCP98000

• Rohs Compliant: YES
• Battery Capacity: 1800mAh
• Battery Technology: Lithium
• Battery Voltage: 3V
• Battery Terminals: Connector
• Weight: 0.12lb

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Interrupts
performance,
characteristics
Functional safety certification
Number of channels
Operating voltage
Operating current
Absolute maximum input
Response time
Input protection
Isolation
Bus current required
Dissipated power
Fuse
Support rack
Characteristics
Module type
5/24
(continued)
State 1
State 0
State 1
State 0
On-to-off
Off-to-on
Point-to-point
Point-to-bus
Internal
External
,
c
c
mA
mA
c
µs
µs
c
a
a
mA
W
Modicon
automation platform
High-speed input module with interrupts
Interrupts allow the I/O to be updated within a segment, not at the end of the
segment as normally happens. When an interrupt occurs, an ITMR or IMOD
instruction provides the CPU with a pointer to a specific subroutine designed to take
account of this interrupt. Subroutines reside in separate segments of the program,
and individual subroutines may be called into service multiple times during a single
scan or only once over many scans.
To help ensure rapid execution of the interrupt handler subroutines, certain
instructions must not be used within the interrupt handler subroutine. The following
instructions, used in an interrupt handler subroutine, will cause it to abort:
b
b
b
b
b
For most applications, the impact of interrupt handlers on the scan time is minimal,
even when interrupts are generated several times during the scan. Interrupt handlers
allow a critical part of the application to be taken into account faster than the overall
application. However, take care not to overtax the CPU's capacity by taking account
of interrupts. We recommend that you create a timing diagram to help ensure that
interrupts do not consume more than 40% of the CPU's processing time. The
percentage of CPU usage (the time required to take account of an interrupt) is critical
to analyzing the impact on the scan time.
The time it takes to execute an interrupt handler subroutine can be calculated by
adding the instruction execution times for the logic in the subroutine. The overhead
for adding an IMOD or ITMR instruction to the CPU is 60 μs/scan; this is the amount
of time it takes the CPU to constantly check whether a timer has been triggered or
whether a hardware interrupt needs to be handled. There is no incremental overhead
for adding a second IMOD or ITMR instruction to the CPU.
Interrupt handler performance is measured from the time the input signal arrives at
the input module to the time an output is commanded to change state. The
measurement takes account of module filter times and the time for taking account of
and handling interrupts.
Interrupts (continued)
984LL interrupt instructions (built into the firmware of Quantum CPUs) (continued)
Performance
Impact of interrupts on the scan time
General performance
–
16 isolated
15…30 V
- 3...+5 V
2.0...8.0
0...0.5
30 V continuous operation
30 max.
130 max.
30 V against reverse polarity
500 V rms for 1 minute
1780 V rms for 1 minute
400
2 + (0.3 x number of points)
None
According to user custom
Local only
140 HLI 340 00
MSTR (for reading and writing over a Modbus Plus
READ/WRIT on ASCII, PCFL strings (floating point process control library)
Equation networks
T1.0, T0.1 and T.01 timers
Instructions that can be downloaded by the user
®
Quantum
™
™
network)
0