DP83816AVNG National Semiconductor, DP83816AVNG Datasheet - Page 26

• Manufacturer Part Number: DP83816AVNG
• Description: Ethernet Media Access Controller IC
• Manufacturer: National Semiconductor

Specifications of DP83816AVNG

• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Features: Physical Layer
• Package / Case: 144-LQFP
• Package: 144LQFP
• Standard Supported: IEEE 802.3|IEEE 802.3u|IEEE 802.3x
• Communication Mode: Full Duplex|Half Duplex
• Network Interface: MII
• Data Rate: 10|100 Mbps
• Host Interface: PCI
• Operating Supply Voltage: 3.3 V
• Loopback Mode: Internal
• Maximum Power Dissipation: 0.504 W
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.0 Functional Description
3.11 10BASE-T Transceiver Module
The 10BASE-T Transceiver Module is IEEE 802.3
compliant. It includes the receiver, transmitter, collision,
heartbeat, loopback, jabber, and link integrity functions, as
defined in the standard. An external filter is not required on
the 10BASE-T interface since this is integrated inside the
DP83816. This section focuses on the general 10BASE-T
system level operation.
3.11.1 Operational Modes
The DP83816 has two basic 10BASE-T operational
modes:
— Half Duplex mode - functions as a standard IEEE 802.3
— Full Duplex mode - capable of simultaneously
3.11.2 Smart Squelch
The smart squelch is responsible for determining when
valid data is present on the differential receive inputs
(RD±). The DP83816 implements an intelligent receive
squelch to ensure that impulse noise on the receive inputs
will not be mistaken for a valid signal. Smart squelch
operation is independent of the 10BASE-T operational
mode.
3.11.3 Collision Detection
When in Half Duplex, a 10BASE-T collision is detected
when the receive and transmit channels are active
simultaneously. Collisions are reported to the MAC.
Collisions are also reported when a jabber condition is
detected.
If the ENDEC is receiving when a collision is detected it is
reported immediately (through the COL signal).
When heartbeat is enabled, approximately 1 µs after the
transmission of each packet, a Signal Quality Error (SQE)
signal of approximately 10 bit times is generated to indicate
successful transmission.
The SQE test is inhibited when the physical layer is set in
full duplex mode. SQE can also be inhibited by setting the
HEARTBEAT_DIS bit in the TBTSCR register.
10BASE-T transceiver supporting the CSMA/CD
protocol.
transmitting and receiving without reporting a collision.
The DP83816's 10 Mb/s ENDEC is designed to encode
and decode simultaneously.
V
V
SQ+(reduced)
SQ-(reduced)
Figure 3-14 10BASE-T Twisted Pair Smart Squelch Operation
V
V
SQ+
SQ-
(Continued)
<150 ns
start of packet
<150 ns
26
The squelch circuitry employs a combination of amplitude
and timing measurements (as specified in the IEEE 802.3
10BASE-T standard) to determine the validity of data on
the twisted pair inputs (refer to Figure 3-14).
The signal at the start of packet is checked by the smart
squelch and any pulses not exceeding the squelch level
(either positive or negative, depending upon polarity) will
be rejected. Once this first squelch level is overcome
correctly, the opposite squelch level must then be
exceeded within 150 ns. Finally the signal must again
exceed the original squelch level within a 150 ns to ensure
that the input waveform will not be rejected. This checking
procedure results in the loss of typically three preamble bits
at the beginning of each packet.
Only after all these conditions have been satisfied will a
control signal be generated to indicate to the remainder of
the circuitry that valid data is present. At this time, the
smart squelch circuitry is reset.
Valid data is considered to be present until the squelch
level has not been generated for a time longer than 150 ns,
indicating the End of Packet. Once good data has been
detected the squelch levels are reduced to minimize the
effect of noise causing premature End of Packet detection.
3.11.4 Normal Link Pulse Detection/Generation
The link pulse generator produces pulses as defined in the
IEEE 802.3 10BASE-T standard. Each link pulse is
nominally 100 ns in duration and transmitted every 16 ms
in the absence of transmit data.
Link pulses are used to check the integrity of the
connection with the remote end. If valid link pulses are not
received, the link detector disables the 10BASE-T twisted
pair transmitter, receiver and collision detection functions.
When
(FORCE_LINK_10 of the TBTSCR register), good link is
forced and the 10BASE-T transceiver will operate
regardless of the presence of link pulses.
the
link
end of packet
integrity
>150 ns
function
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is
disabled