ADF7021BCPZ Analog Devices Inc, ADF7021BCPZ Datasheet - Page 60

• Manufacturer Part Number: ADF7021BCPZ
• Description: IC, NARROW BAND TXRX, 80-950MHZ LFCSP-48
• Manufacturer: Analog Devices Inc

Specifications of ADF7021BCPZ

• Receiving Current: 26.4mA
• Transmitting Current: 32.3mA
• Data Rate: 32.8Kbps
• Frequency Range: 80MHz To 950MHz
• Rf Ic Case Style: LFCSP
• No. Of Pins: 48
• Supply Voltage Range: 2.3V To 3.6V
• Frequency: 80MHz ~ 650MHz, 862MHz ~ 940MHz
• Data Rate - Maximum: 33kbps
• Modulation Or Protocol: 2-FSK, 3-FSK, 4-FSK, MSK
• Applications: Keyless Entery, Pagers, WMTS
• Power - Output: -20dBm ~ 13dBm
• Sensitivity: -130dBm
• Voltage - Supply: 2.3 V ~ 6 V
• Current - Receiving: 20mA
• Current - Transmitting: 32.3mA @ 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7021BZ5 - BOARD DAUGHTER MATCH UNPOPULATEDEVAL-ADF7021BZ2 - BOARD DAUGHTER 860/870MHZEVAL-ADF7021BIZ - BOARD DAUGHTER 421/440MHZEVAL-ADF7021BEZ - BOARD DAUGHTER 420/440MHZ
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

ADF7021
REGISTER 14—TEST DAC REGISTER
The demodulator tuning parameters, PULSE_EXTENSION,
ED_LEAK_FACTOR, and ED_PEAK_RESPONSE, can only be
enabled by setting R15_DB[4:7] to 0x9.
Using the Test DAC to Implement Analog FM DEMOD
and Measuring SNR
The test DAC allows the post demodulator filter out for both
linear and correlator demodulators to be viewed externally. The
test DAC also takes the 16-bit filter output and converts it to a
high frequency, single-bit output using a second-order, error
feedback Σ-Δ converter. The output can be viewed on the SWD
pin. This signal, when filtered appropriately, can then be used to
do the following:
•
•
Monitor the signals at the FSK post demodulator filter
output. This allows the demodulator output SNR to be
measured. Eye diagrams of the received bit stream can also
be constructed to measure the received signal quality.
Provide analog FM demodulation.
PULSE EXTENSION
0
1
2
3
NO PULSE EXTENSION
EXTENDED BY 1
EXTENDED BY 2
EXTENDED BY 3
ED LEAK FACTOR
0
1
2
3
4
5
6
7
LEAKAGE =
2^–8
2^–9
2^–10
2^–11
2^–12
2^–13
2^–14
2^–15
TEST_DAC_GAIN
0
1
2
3
ED PEAK RESPONSE
FULL RESPONSE TO PEAK
0.5 RESPONSE TO PEAK
0.25 RESPONSE TO PEAK
0.125 RESPONSE TO PEAK
Figure 76. Register 14—Test DAC Register Map
Rev. A | Page 60 of 64
TEST DAC GAIN
0
1
...
15
NO GAIN
× 2^1
...
× 2^15
TEST DAC OFFSET
While the correlators and filters are clocked by DEMOD CLK,
CDR CLK clocks the test DAC. Note that although the test
DAC functions in regular user mode, the best performance is
achieved when the CDR_CLK is increased to or above the
frequency of DEMOD CLK. The CDR block does not function
when this condition exists.
Programming Register 14 enables the test DAC. Both the
linear and correlator/demodulator outputs can be multiplexed
into the DAC.
Register 14 allows a fixed offset term to be removed from the
signal (to remove the IF component in the ddt case). It also has
a signal gain term to allow the usage of the maximum dynamic
range of the DAC.
ADDRESS
BITS