ADF7021BCPZ Analog Devices Inc, ADF7021BCPZ Datasheet - Page 53

• Manufacturer Part Number: ADF7021BCPZ
• Description: IC, NARROW BAND TXRX, 80-950MHZ LFCSP-48
• Manufacturer: Analog Devices Inc

Specifications of ADF7021BCPZ

• Receiving Current: 26.4mA
• Transmitting Current: 32.3mA
• Data Rate: 32.8Kbps
• Frequency Range: 80MHz To 950MHz
• Rf Ic Case Style: LFCSP
• No. Of Pins: 48
• Supply Voltage Range: 2.3V To 3.6V
• Frequency: 80MHz ~ 650MHz, 862MHz ~ 940MHz
• Data Rate - Maximum: 33kbps
• Modulation Or Protocol: 2-FSK, 3-FSK, 4-FSK, MSK
• Applications: Keyless Entery, Pagers, WMTS
• Power - Output: -20dBm ~ 13dBm
• Sensitivity: -130dBm
• Voltage - Supply: 2.3 V ~ 6 V
• Current - Receiving: 20mA
• Current - Transmitting: 32.3mA @ 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7021BZ5 - BOARD DAUGHTER MATCH UNPOPULATEDEVAL-ADF7021BZ2 - BOARD DAUGHTER 860/870MHZEVAL-ADF7021BIZ - BOARD DAUGHTER 421/440MHZEVAL-ADF7021BEZ - BOARD DAUGHTER 420/440MHZ
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

REGISTER 6—IF FINE CAL SETUP REGISTER
A fine IF filter calibration is set by enabling the IF_FINE_CAL
Bit (R6_DB4). A fine calibration is then carried out only when
Register 5 is written to and R5_DB4 is set.
Set the IF upper and lower tones used during fine filter
calibration as follows:
The IF tone calibration time is the amount of time that is spent
at an IF calibration tone. It is dependent on the sequencer clock.
IRD1
0
1
IF
IF
_
_
IR CAL SOURCE ÷2
SOURCE ÷2 OFF
SOURCE ÷2 ON
CAL
CAL
IRC2
0
0
1
1
_
_
UPPER
IRC1
LOWER
0
1
0
1
IR CAL SOURCE
DRIVE LEVEL
OFF
LOW
MED
HIGH
XTAL
XTAL
_
_
TONE
1
CD7
0
0
0
.
.
TONE
IF_CAL_DWELL_TIME
...
...
...
...
...
...
...
_
_
DIVIDE
DIVIDE
1
CD3
0
0
0
.
.
1
CD2
0
1
1
.
.
×
×
2
1
2
CD1
1
0
1
.
.
Figure 68. Register 6—IF Fine Cal Setup Register Map
=
=
131
65
UT8
0
IF CAL
DWELL TIME
1
2
3
.
.
127
0
0
0
.
.
8 .
5 .
kHz
kHz
UT7
1
0
0
0
.
.
IF_CAL_UPPER_TONE_DIVIDE
...
...
...
...
...
...
...
Rev. A | Page 53 of 64
1
UT3
0
0
0
.
.
1
UT2
0
1
1
.
.
1
UT1
1
0
1
.
.
For best practice, is recommended to have the IF tone
calibration time be at least 500 μs.
The total time for a fine IF filter calibration is
DB[28:30] control the internal source for the image rejection
(IR) calibration. The IR_CAL_SOURCE_DRIVE_LEVEL bits
(DB[28:29]) set the drive strength of the source, whereas the
IR_CAL_SOURCE_÷2 bit (DB30) allows the frequency of the
internal signal source to be divided by 2.
IF CAL UPPER
TONE DIVIDE
1
2
3
.
.
127
IF Tone Calibration Time × 10.
IF
Tone
1
LT8
0
0
0
.
.
IF_CAL_LOWER_TONE_DIVIDE
Calibratio
LT7
1
0
0
0
.
.
...
...
...
...
...
...
...
1
LT3
0
0
0
.
.
n
Time
1
LT2
0
1
1
.
.
1
LT1
1
0
1
.
.
=
IF
1
2
3
.
.
255
IF CAL LOWER
TONE DIVIDE
_
FC1
0
1
CAL
IF FINE CAL
DISABLED
ENABLED
SEQ
_
DWELL
CLK
ADDRESS
ADF7021
BITS
_
TIME