ADF7021BCPZ Analog Devices Inc, ADF7021BCPZ Datasheet - Page 32

• Manufacturer Part Number: ADF7021BCPZ
• Description: IC, NARROW BAND TXRX, 80-950MHZ LFCSP-48
• Manufacturer: Analog Devices Inc

Specifications of ADF7021BCPZ

• Receiving Current: 26.4mA
• Transmitting Current: 32.3mA
• Data Rate: 32.8Kbps
• Frequency Range: 80MHz To 950MHz
• Rf Ic Case Style: LFCSP
• No. Of Pins: 48
• Supply Voltage Range: 2.3V To 3.6V
• Frequency: 80MHz ~ 650MHz, 862MHz ~ 940MHz
• Data Rate - Maximum: 33kbps
• Modulation Or Protocol: 2-FSK, 3-FSK, 4-FSK, MSK
• Applications: Keyless Entery, Pagers, WMTS
• Power - Output: -20dBm ~ 13dBm
• Sensitivity: -130dBm
• Voltage - Supply: 2.3 V ~ 6 V
• Current - Receiving: 20mA
• Current - Transmitting: 32.3mA @ 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7021BZ5 - BOARD DAUGHTER MATCH UNPOPULATEDEVAL-ADF7021BZ2 - BOARD DAUGHTER 860/870MHZEVAL-ADF7021BIZ - BOARD DAUGHTER 421/440MHZEVAL-ADF7021BEZ - BOARD DAUGHTER 420/440MHZ
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

ADF7021
RSSI Formula (Converting to dBm)
The RSSI formula is
where:
Readback Code is given by Bit RV7 to Bit RV1 in the readback
register (see the Readback Format section).
Gain Mode Correction is given by the values in Table 15.
The LNA gain (LG2, LG1) and filter gain (FG2, FG1) values
are also obtained from the readback register, as part of an RSSI
readback.
Table 15. Gain Mode Correction
LNA Gain
(LG2, LG1)
H (1, 0)
M (0, 1)
M (0, 1)
M (0, 1)
L (0, 0)
An additional factor should be introduced to account for losses
in the front-end-matching network/antenna.
DEMODULATION, DETECTION, AND CDR
System Overview
An overview of the demodulation, detection, and clock and
data recovery (CDR) of the received signal on the ADF7021 is
shown in Figure 46.
The quadrature outputs of the IF filter are first limited and
then fed to either the correlator FSK demodulator or the
linear FSK demodulator. The correlator demodulator is used
to demodulate 2FSK, 3FSK, and 4FSK. The linear demodulator
is used for frequency measurement and is enabled when the
AFC loop is active. The linear demodulator can also be used
to demodulate 2FSK.
Following the demodulator, a digital post demodulator filter
removes excess noise from the demodulator signal output.
Threshold/slicer detection is used for data recovery of 2FSK and
4FSK. Data recovery of 3FSK can be implemented using either
threshold detection or Viterbi detection.
An on-chip CDR PLL is used to resynchronize the received bit
stream to a local clock. It outputs the retimed data and clock on
the TxRxDATA and TxRxCLK pins, respectively.
Input Power [dBm] =
−130 dBm + (Readback Code + Gain Mode Correction) × 0.5
Filter Gain
(FG2, FG1)
H (1, 0)
H (1, 0)
M (0, 1)
L (0, 0)
L (0, 0)
Gain Mode
Correction
0
24
38
58
86
Rev. A | Page 32 of 64
Correlator Demodulator
The correlator demodulator can be used for 2FSK, 3FSK, and
4FSK demodulation. Figure 47 shows the operation of the
correlator demodulator for 2FSK.
The quadrature outputs of the IF filter are first limited and then
fed to a digital frequency correlator that performs filtering and
frequency discrimination of the 2FSK/3FSK/4FSK spectrum.
For 2FSK modulation, data is recovered by comparing the
output levels from two correlators. The performance of this
frequency discriminator approximates that of a matched filter
detector, which is known to provide optimum detection in the
presence of additive white Gaussian noise (AWGN). This
method of FSK demodulation provides approximately 3 dB to
4 dB better sensitivity than a linear demodulator.
DISCRIMINATOR BW
TxRx CLK
LIMITERS
TxRxDATA
Q
R4_DB(10:19)
I
Figure 46. Overview of Demodulation, Detection, and CDR Process
LIMITERS
Q
I
Figure 47. 2FSK Correlator Demodulator Operation
FREQUENCY CORRELATOR
RECOVERY
IF –
CLOCK
DATA
DOT/CROSS PRODUCT
AND
DISCRIM BW
DEMODULATOR
CORRELATOR
f
FREQUENCY
DEV
LINEAR
R4_DB7
IF
IF +
MUX
f
Rx DATA INVERT
DEV
R4_DB9
MUX
THRESHOLD
DETECTION
DETECTION
2/3/4FSK
VITERBI
3FSK
2FSK = +1, –1
3FSK = +1, 0, –1
4FSK = +3, +1, –1, –3
OUTPUT LEVELS: