ADF7021BCPZ Analog Devices Inc, ADF7021BCPZ Datasheet - Page 51

IC, NARROW BAND TXRX, 80-950MHZ LFCSP-48

ADF7021BCPZ

Manufacturer Part Number
ADF7021BCPZ
Description
IC, NARROW BAND TXRX, 80-950MHZ LFCSP-48
Manufacturer
Analog Devices Inc
Datasheets

Specifications of ADF7021BCPZ

Receiving Current
26.4mA
Transmitting Current
32.3mA
Data Rate
32.8Kbps
Frequency Range
80MHz To 950MHz
Rf Ic Case Style
LFCSP
No. Of Pins
48
Supply Voltage Range
2.3V To 3.6V
Frequency
80MHz ~ 650MHz, 862MHz ~ 940MHz
Data Rate - Maximum
33kbps
Modulation Or Protocol
2-FSK, 3-FSK, 4-FSK, MSK
Applications
Keyless Entery, Pagers, WMTS
Power - Output
-20dBm ~ 13dBm
Sensitivity
-130dBm
Voltage - Supply
2.3 V ~ 6 V
Current - Receiving
20mA
Current - Transmitting
32.3mA @ 10dBm
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LFCSP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF7021BZ5 - BOARD DAUGHTER MATCH UNPOPULATEDEVAL-ADF7021BZ2 - BOARD DAUGHTER 860/870MHZEVAL-ADF7021BIZ - BOARD DAUGHTER 421/440MHZEVAL-ADF7021BEZ - BOARD DAUGHTER 420/440MHZ
Memory Size
-
Lead Free Status / Rohs Status
Compliant

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REGISTER 4—DEMODULATOR SETUP REGISTER
To solve for DISCRIMINATOR_BW, use the following
equation:
where the maximum value = 660.
For 2FSK,
For 3FSK,
For 4FSK,
DW10
0
0
.
.
.
.
1
IFB2
0
0
1
1
DISCRIMINATOR_BW =
K
K
K
.
.
.
.
.
.
.
.
IFB1
0
1
0
1
IF_BW
=
=
=
Round
Round
Round
DW6
0
0
.
.
.
.
1
IF FILTER
BW
12.5kHz
18.75kHz
25kHz
INVALID
DW5
0
0
.
.
.
.
1
4
FSK
100
100
2
DW4
0
0
.
.
.
.
1
×
100
f
4
×
×
f
DEV
DEV
×
10
10
DW3
0
0
.
.
.
.
1
×
f
3
3
DEV
10
POST_DEMOD_BW
3
DW2
0
1
.
.
.
.
1
TD10
0
0
.
.
.
.
1
DEMOD
DW1
1
0
.
.
.
.
1
.
.
.
.
.
.
.
.
400 ×
POST DEMOD
BW
1
2
.
.
.
.
1023
TD6
0
0
.
.
.
.
0
CLK
10
TD5
0
0
.
.
.
.
1
3
Figure 66. Register 4—Demodulator Setup Register Map
× K
TD4
0
0
.
.
.
.
0
TD3
0
0
.
.
.
.
1
TD2
0
1
.
.
.
.
0
Rev. A | Page 51 of 64
TD1
1
0
.
.
.
.
0
DISCRIMINATOR_BW
RI2
0
0
1
1
CORRELATOR
DISCRIM BW
1
2
.
.
.
.
660
RI1
0
1
0
1
where:
Round is rounded to the nearest integer.
Round
31, 28, 27, 24, 23, 20, 19, 16, 15, 12, 11, 8, 7, 4, 3.
f
the frequency deviation used for the ±1 symbols (that is, the
inner frequency deviations).
Rx_INVERT (DB[8:9]) and DOT_PRODUCT (DB7) need to be
set as outlined in Table 17 and Table 18.
where the
filter should typically be 0.75 × the data rate in 2FSK. In 3FSK,
it should be set equal to the data rate, while in 4FSK, it should
be set equal to 1.6 × symbol rate.
DEV
INVERT
NORMAL
INVERT CLK
INVERT DATA
INVERT CLK/DATA
is the transmit frequency deviation in Hz. For 4FSK, f
POST_DEMOD
4FSK
is rounded to the nearest of the following integers: 32,
cutoff frequency (f
DP1
0
1
INVERT
DS3
0
0
0
0
1
1
1
1
Rx_
_BW
PRODUCT
CROSS PRODUCT
DOT PRODUCT
DS2
0
0
1
1
0
0
1
1
DS1
0
1
0
1
0
1
0
1
=
2
CUTOFF
DEMOD
11
DEMOD_
SCHEME
DEMODULATOR SCHEME
2FSK LINEAR DEMODULATOR
2FSK CORRELATOR DEMODULATOR
3FSK DEMOD
4FSK DEMOD
RESERVED
RESERVED
RESERVED
RESERVED
×
π
) of the post demodulator
×
f
CUTOFF
CLK
ADDRESS
BITS
ADF7021
DEV
is

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