EP7312M-CBZ Cirrus Logic Inc, EP7312M-CBZ Datasheet - Page 52
![IC, 32BIT MCU, ARM7, 74MHZ, BGA-256](/photos/39/69/396959/bga256_sml.jpg)
EP7312M-CBZ
Manufacturer Part Number
EP7312M-CBZ
Description
IC, 32BIT MCU, ARM7, 74MHZ, BGA-256
Manufacturer
Cirrus Logic Inc
Series
EP7r
Specifications of EP7312M-CBZ
Controller Family/series
(ARM7)
No. Of I/o's
27
Ram Memory Size
48KB
Cpu Speed
74MHz
No. Of Timers
2
No. Of Pwm Channels
2
Digital Ic Case Style
BGA
Core Size
32 Bit
Core Processor
ARM7
Speed
74MHz
Connectivity
Codec, DAI, EBI/EMI, IrDA, Keypad, SPI/Microwire1, UART/USART
Peripherals
LCD, LED, MaverickKey, PWM
Number Of I /o
27
Program Memory Type
ROMless
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 2.7 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
256-BGA
Embedded Interface Type
SSI, UART
Rohs Compliant
Yes
Processor Series
EP73xx
Core
ARM720T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB7312
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1209 - KIT DEVELOPMENT EP73XX ARM7
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
598-1247
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP7312M-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
EP7312
High-Performance, Low-Power System on Chip
52
Ball Location
J10
J11
J12
J13
J14
J15
J16
K10
K11
K12
K13
K14
K15
K16
L10
L11
L12
L13
L14
L15
L16
K1
K2
K3
K4
K5
K6
K7
K8
K9
M1
M2
M3
M4
M5
J7
J8
J9
L1
L2
L3
L4
L5
L6
L7
L8
L9
PE[0]/BOOTSEL[0]
PD[0]/LEDFLSH
PE[2]/CLKSEL
A[17]/DRA[10]
A[16]/DRA[11]
A[15]/DRA[12]
A[14]/DRA[13]
A[22]/DRA[5]
A[21]/DRA[6]
A[18]/DRA[9]
A[19]/DRA[8]
nTEST[1]
nTEST[0]
VSSRTC
VSSRTC
LEDDRV
VSSRTC
nEINT[1]
VSSRTC
VSSRTC
VSSRTC
nEINT[2]
EINT[3]
nTRST
COL[4]
VDDIO
VDDIO
RXD[1]
VDDIO
COL[6]
VDDIO
PHDIN
VSSIO
ADCIN
VSSIO
VSSIO
Name
TCLK
D[16]
D[17]
D[20]
D[19]
D[18]
D[31]
DCD
CTS
DSR
TMS
Strength
With p/u*
With p/u*
with p/u*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
†
Table 22. 256-Ball PBGA Ball Listing (Continued)
Input
Input
Reset
State
High
High
©
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Copyright Cirrus Logic, Inc. 2005
‡
‡
(All Rights Reserved)
Core ground
RTC ground
RTC ground
RTC ground
RTC ground
RTC ground
Pad ground
Pad ground
Pad ground
Pad power
Pad power
Pad power
Pad power
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
UART 1 clear to send input
Real time clock ground
Real time clock ground
System byte address / SDRAM address
System byte address / SDRAM address
System byte address / SDRAM address
System byte address / SDRAM address
JTAG async reset input
Data I/O
Data I/O
IR LED drive
Photodiode input
I/O ground
UART 1 data carrier detect
Test mode select input
External interrupt
Real time clock ground
SSI1 ADC serial input
Keyboard scanner column drive
JTAG clock
Data I/O
Data I/O
Data I/O
I/O ground
Digital I/O power, 3.3V
Digital I/O power, 3.3V
UART 1 receive data input
UART 1 data set ready input
Digital I/O power, 3.3V
External interrupt input
GPIO port E / clock input mode select
Real time clock ground
GPIO port D / LED blinker output
Real time clock ground
Keyboard scanner column drive
Data I/O
Real time clock ground
System byte address / SDRAM address
System byte address / SDRAM address
I/O ground
System byte address / SDRAM address
System byte address / SDRAM address
Test mode select input
External interrupt input
Digital I/O power, 3.3V
GPIO port E / Boot mode select
JTAG mode select
Description
DS508F1