M24LR64-RMN6/2 STMicroelectronics, M24LR64-RMN6/2 Datasheet - Page 18

• Manufacturer Part Number: M24LR64-RMN6/2
• Description: EEPROM, 64K, DUAL INTERFACE, 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M24LR64-RMN6/2

• Memory Size: 64Kbit
• Clock Frequency: 400kHz
• Access Time: 900ns
• Supply Voltage Range: 1.8V To 5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC
• Memory Configuration: 8192 X 8, 2048 X 32
• Interface Type: I2C, Serial, 2-Wire
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

User memory organization
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User memory organization
The M24LR64-R is divided into 64 sectors of 32 blocks of 32 bits as shown in
Figure 7
and/or write-protected using a specific password command. Read and write operations are
possible if the addressed data are not in a protected sector.
The M24LR64-R also has a 64-bit block that is used to store the 64-bit unique identifier
(UID). The UID is compliant with the ISO 15963 description, and its value is used during the
anticollision sequence (Inventory). This block is not accessible by the user and its value is
written by ST on the production line.
The M24LR64-R includes an AFI register that stores the application family identifier, and a
DSFID register that stores the data storage family identifier used in the anticollision
algorithm.
The M24LR64-R has four additional 32-bit blocks that store an I
password codes.
Figure 6.
shows the memory sector organization. Each sector can be individually read-
Block diagram
AC0
AC1
RF V
RF
CC
Doc ID 15170 Rev 11
Power management
Logic
EEPROM
Latch
Contact V
2
I
2
C password plus three RF
C
CC
ai15123
SCL
SDA
V
V
CC
SS
Table
M24LR64-R
5.