M24LR64-RMN6/2 STMicroelectronics, M24LR64-RMN6/2 Datasheet - Page 11

• Manufacturer Part Number: M24LR64-RMN6/2
• Description: EEPROM, 64K, DUAL INTERFACE, 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M24LR64-RMN6/2

• Memory Size: 64Kbit
• Clock Frequency: 400kHz
• Access Time: 900ns
• Supply Voltage Range: 1.8V To 5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC
• Memory Configuration: 8192 X 8, 2048 X 32
• Interface Type: I2C, Serial, 2-Wire
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M24LR64-R
Figure 48.
Figure 49.
Figure 50.
Figure 51.
Figure 52.
Figure 53.
Figure 54.
Figure 55.
Figure 56.
Figure 57.
Figure 58.
Figure 59.
Figure 60.
Figure 61.
Figure 62.
Figure 63.
Figure 64.
Figure 65.
Figure 66.
Figure 67.
Figure 68.
Figure 69.
Figure 70.
Figure 71.
Figure 72.
Figure 73.
Figure 74.
Figure 75.
Figure 76.
M24LR64-R protocol timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
M24LR64-R state transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Principle of comparison between the mask, the slot number and the UID . . . . . . . . . . . . . 68
Description of a possible anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Stay Quiet frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . 76
Read Single Block frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . 78
Write Single Block frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . 80
Read Multiple Block frame exchange between VCD and M24LR64-R. . . . . . . . . . . . . . . . 82
Select frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Reset to Ready frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . 84
Write AFI frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . 86
Lock AFI frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . 88
Write DSFID frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . 90
Lock DSFID frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . 92
Get System Info frame exchange between VCD and M24LR64-R. . . . . . . . . . . . . . . . . . . 94
Get Multiple Block Security Status frame exchange between VCD and M24LR64-R . . . . 96
Write-sector Password frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . 98
Lock-sector Password frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . 100
Present-sector Password frame exchange between VCD and M24LR64-R . . . . . . . . . . 102
Fast Read Single Block frame exchange between VCD and M24LR64-R . . . . . . . . . . . . 104
Fast Initiate frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . 106
Fast Read Multiple Block frame exchange between VCD and M24LR64-R. . . . . . . . . . . 108
Initiate frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . . 110
AC test measurement I/O waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
I
M24LR64-R synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . 117
SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . 118
UFDFPN8 (MLP8) – Ultra thin fine pitch dual flat package no lead
2 x 3 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
TSSOP8 – 8-lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . 120
2
C AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Doc ID 15170 Rev 11
List of figures
11/128