DSPIC30F5011-20I/PTG Microchip Technology, DSPIC30F5011-20I/PTG Datasheet - Page 81

• Manufacturer Part Number: DSPIC30F5011-20I/PTG
• Description: IC, DSC, 16BIT, 66KB, 40MHZ 5.5V TQFP-64
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F5011-20I/PTG

• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 52
• Flash Memory Size: 66KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.0
This section describes the input capture module and
associated operational modes. The features provided
by this module are useful in applications requiring
frequency
Figure 12-1 depicts a block diagram of the input cap-
ture module. Input capture is useful for such modes as:
• Frequency/Period/Pulse Measurements
• Additional Sources of External Interrupts
The key operational features of the input capture
module are:
• Simple Capture Event mode
• Timer2 and Timer3 mode selection
• Interrupt on input capture event
These operating modes are determined by setting the
appropriate bits in the ICxCON register (where
x = 1,2,...,N). The dsPIC DSC devices contain up to 8
capture channels (i.e., the maximum value of N is 8).
FIGURE 12-1:
© 2008 Microchip Technology Inc.
Note:
ICx pin
Note:
INPUT CAPTURE MODULE
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
(period)
Where ‘x’ is shown, reference is made to the registers or bits associated to the respective input capture
channels 1 through N.
Prescaler
1, 4, 16
INPUT CAPTURE MODE BLOCK DIAGRAM
3
and
Data Bus
ICxCON
Mode Select
ICM<2:0>
pulse
ICBNE, ICOV
Synchronizer
Clock
measurement.
ICI<1:0>
Detection
Edge
Logic
From GP Timer Module
12.1
The simple capture events in the dsPIC30F product
family are:
• Capture every falling edge
• Capture every rising edge
• Capture every 4th rising edge
• Capture every 16th rising edge
• Capture every rising and falling edge
These simple Input Capture modes are configured by
setting the appropriate bits ICM<2:0> (ICxCON<2:0>).
12.1.1
There are four input capture prescaler settings
specified by bits ICM<2:0> (ICxCON<2:0>). Whenever
the capture channel is turned off, the prescaler counter
will be cleared. In addition, any Reset will clear the
prescaler counter.
Interrupt
Logic
dsPIC30F5011/5013
Set Flag
Set Flag
ICxIF
ICxIF
Simple Capture Event Mode
CAPTURE PRESCALER
Logic
FIFO
R/W
T2_CNT
ICxBUF
1
16
DS70116H-page 81
0
T3_CNT
16
ICTMR