SC16C2552BIA44 NXP Semiconductors, SC16C2552BIA44 Datasheet - Page 18

UART, 2 CH, 16BYTE FIFO, 16C2552

SC16C2552BIA44

Manufacturer Part Number
SC16C2552BIA44
Description
UART, 2 CH, 16BYTE FIFO, 16C2552
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C2552BIA44

No. Of Channels
2
Data Rate
5Mbps
Supply Voltage Range
2.25V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
PLCC
No. Of Pins
44
Svhc
No SVHC (18-Jun-2010)
Operating
RoHS Compliant
Uart Features
Independent Transmit & Receive UART Control, Multi-Function Output, Modem Control Functions
Rohs Compliant
Yes

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NXP Semiconductors
SC16C2552B_3
Product data sheet
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 16.
Bit
7:5
4
3
2
1
0
Symbol
MCR[7:5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Description
reserved; initialized to a logic 0
Loopback. Enable the local Loopback mode (diagnostics). In this mode the
transmitter output (TX) and the receiver input (RX), CTS, DSR, CD and RI
are disconnected from the SC16C2552B I/O pins. Internally the modem
data and control pins are connected into a loopback data configuration
(see
fully operational. The modem control interrupts are also operational, but
the interrupts’ sources are switched to the lower four bits of the Modem
Control. Interrupts continue to be controlled by the IER register.
OP2. Used to control the modem CD signal in the Loopback mode.
OP1. This bit is used in the Loopback mode only. In the Loopback mode,
this bit is used to write the state of the modem RI interface signal.
RTS
DTR
Rev. 03 — 12 February 2009
logic 0 = disable Loopback mode (normal default condition)
logic 1 = enable local Loopback mode (diagnostics)
logic 0 = sets OP2 to a logic 1 (normal default condition). In the
Loopback mode, sets CD internally to a logic 1.
logic 1 = sets OP2 to a logic 0. In the Loopback mode, sets CD internally
to a logic 0.
logic 0 = force RTS output to a logic 1 (normal default condition)
logic 1 = force RTS output to a logic 0
logic 0 = force DTR output to a logic 1 (normal default condition)
logic 1 = force DTR output to a logic 0
Figure
4). In this mode, the receiver and transmitter interrupts remain
SC16C2552B
© NXP B.V. 2009. All rights reserved.
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