ADC108S052CIMT National Semiconductor, ADC108S052CIMT Datasheet - Page 4

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ADC108S052CIMT

Manufacturer Part Number
ADC108S052CIMT
Description
10BIT ADC, 8CH, POWERWISE, TSSOP16
Manufacturer
National Semiconductor
Datasheet

Specifications of ADC108S052CIMT

Resolution (bits)
10bit
Input Channel Type
Single Ended
Data Interface
Serial, SPI
Supply Voltage Range - Analogue
2.7V To 5.25V
Supply Voltage Range - Digital
2.7V To 5.25V
Supply
RoHS Compliant
Sampling Rate
500kSPS
Rohs Compliant
Yes

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DIGITAL INPUT CHARACTERISTICS
V
V
I
C
DIGITAL OUTPUT CHARACTERISTICS
V
V
I
C
POWER SUPPLY CHARACTERISTICS (C
V
I
P
AC ELECTRICAL CHARACTERISTICS
f
f
f
t
DC
t
t
IN
OZH
A
SCLK
SCLK
S
CONVERT
ACQ
AD
Symbol
IH
IL
OH
OL
A
C
ADC108S052 Converter Electrical Characteristics
IND
OUT
The following specifications apply for V
200 kSPS to 500 kSPS, and C
T
+ I
, V
A
, I
= 25˚C.
D
MIN
D
OZL
Input High Voltage
Input Low Voltage
Input Current
Digital Input Capacitance
Output High Voltage
Output Low Voltage
Hi-Impedance Output Leakage
Current
Hi-Impedance Output Capacitance
(Note 8)
Output Coding
Analog and Digital Supply Voltages
Total Supply Current
Normal Mode ( CS low)
Total Supply Current
Shutdown Mode (CS high)
Power Consumption
Normal Mode ( CS low)
Power Consumption
Shutdown Mode (CS high)
Minimum Clock Frequency
Maximum Clock Frequency
Sample Rate
Continuous Mode
Conversion (Hold) Time
SCLK Duty Cycle
Acquisition (Track) Time
Throughput Time
Aperture Delay
Parameter
L
= 50pF, unless otherwise noted. Boldface limits apply for T
A
= V
L
= 10 pF)
D
= +2.7V to +5.25V, AGND = DGND = 0V, f
V
V
V
I
I
V
V
f
V
f
V
f
V
f
V
f
V
f
V
f
V
f
Acquisition Time + Conversion Time
SOURCE
SINK
SAMPLE
SAMPLE
SCLK
SCLK
SAMPLE
SAMPLE
SCLK
SCLK
A
A
IN
A
A
A
A
A
A
A
A
A
= V
= V
≥ V
= V
= V
= V
= V
= V
= V
= V
= V
= 0V or V
= 200 µA to 1.0 mA,
= 0 kSPS
= 0 kSPS
= 0 kSPS
= 0 kSPS
D
D
D
D
D
D
D
D
D
D
D
= 1 MSPS, f
= 1 MSPS, f
= 1 MSPS, f
= 1 MSPS, f
= +2.7V to +3.6V
= +4.75V to +5.25V
= 200 µA,
= +2.7V to +3.6V,
= +4.75V to +5.25V,
= +2.7V to +3.6V,
= +4.75V to +5.25V,
= +3.0V
= +5.0V
= +3.0V
= +5.0V
Conditions
4
D
IN
IN
IN
IN
= 40 kHz
= 40 kHz
= 40 kHz
= 40 kHz
(Note 8) (Continued)
SCLK
Typical
±
1000
0.49
1.50
0.09
0.30
1.5
7.5
0.8
0.01
30
60
16
50
30
70
2
2
4
A
= 3.2 MHz to 8 MHz, f
= T
Straight (Natural) Binary
MIN
V
(Note 7)
Limits
to T
D
5.25
12.1
200
500
2.1
2.4
0.8
0.4
2.7
1.1
2.4
3.3
3.2
±
±
13
40
60
16
− 0.5
4
4
8
3
1
1
MAX
: all other limits
SCLK cycles
SCLK cycles
SCLK cycles
kSPS (max)
kSPS (min)
MHz (max)
mW (max)
mW (max)
MHz (min)
mA (max)
mA (max)
µA (max)
µA (max)
pF (max)
pF (max)
% (max)
V (max)
V (max)
V (max)
% (min)
V (min)
V (min)
V (min)
V (min)
SAMPLE
Units
µW
µW
nA
nA
ns
=

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