ADC108S052CIMT National Semiconductor, ADC108S052CIMT Datasheet - Page 16

• Manufacturer Part Number: ADC108S052CIMT
• Description: 10BIT ADC, 8CH, POWERWISE, TSSOP16
• Manufacturer: National Semiconductor

Specifications of ADC108S052CIMT

• Resolution (bits): 10bit
• Input Channel Type: Single Ended
• Data Interface: Serial, SPI
• Supply Voltage Range - Analogue: 2.7V To 5.25V
• Supply Voltage Range - Digital: 2.7V To 5.25V
• Supply: RoHS Compliant
• Sampling Rate: 500kSPS
• Rohs Compliant: Yes

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2.0 Applications Information
output capacitance, the more current flows through the die
substrate and the greater the noise coupled into the analog
channel.
The first solution to keeping digital noise out of the analog
supply is to decouple the analog and digital supplies from
each other or use separate supplies for them. To keep noise
out of the digital supply, keep the output load capacitance as
small as practical. If the load capacitance is greater than 50
pF, use a 100 Ω series resistor at the ADC output, located as
close to the ADC output pin as practical. This will limit the
charge and discharge current of the output capacitance and
improve noise performance. Since the series resistor and
the load capacitance form a low frequency pole, verify signal
integrity once the series resistor has been added.
2.3 LAYOUT AND GROUNDING
Capacitive coupling between the noisy digital circuitry and
the sensitive analog circuitry can lead to poor performance.
The solution is to keep the analog circuitry separated from
the digital circuitry and the clock line as short as possible.
Digital circuits create substantial supply and ground current
transients. The logic noise generated could have significant
impact upon system noise performance. To avoid perfor-
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mance degradation of the ADC108S052 due to supply noise,
do not use the same supply for the ADC108S052 that is used
for digital logic.
Generally, analog and digital lines should cross each other at
90˚ to avoid crosstalk. However, to maximize accuracy in
high resolution systems, avoid crossing analog and digital
lines altogether. It is important to keep clock lines as short as
possible and isolated from ALL other lines, including other
digital lines. In addition, the clock line should also be treated
as a transmission line and be properly terminated.
The analog input should be isolated from noisy signal traces
to avoid coupling of spurious signals into the input. Any
external component (e.g., a filter capacitor) connected be-
tween the converter’s input pins and ground or to the refer-
ence input pin and ground should be connected to a very
clean point in the ground plane.
We recommend the use of a single, uniform ground plane
and the use of split power planes. The power planes should
be located within the same board layer. All analog circuitry
(input amplifiers, filters, reference components, etc.) should
be placed over the analog power plane. All digital circuitry
and I/O lines should be placed over the digital power plane.
Furthermore, all components in the reference circuitry and
the input signal chain that are connected to ground should
be connected together with short traces and enter the analog
ground plane at a single, quiet point.