LIS35DETR STMicroelectronics, LIS35DETR Datasheet - Page 26

• Manufacturer Part Number: LIS35DETR
• Description: IC ACCELEROMETER 3AXIS 14LGA
• Manufacturer: STMicroelectronics

Specifications of LIS35DETR

• Axis: X, Y, Z
• Acceleration Range: ±2.3g, 9.2g
• Sensitivity: 18mg/digit, 72mg/digit
• Voltage - Supply: 2.16 V ~ 3.6 V
• Output Type: Digital
• Bandwidth: 100Hz ~ 400Hz Selectable
• Interface: I²C, SPI
• Mounting Type: Surface Mount
• Package / Case: 14-LGA
• Sensing Axis: X, Y, Z
• Acceleration: 2 g, 8 g
• Digital Output - Number Of Bits: 8 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.16 V
• Supply Current: 0.3 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Digital Output - Bus Interface: I2C, SPI
• Mounting Style: SMD/SMT
• Shutdown: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register description
7.2
26/39
CTRL_REG2 (21h)
Table 19.
Table 20.
SIM bit selects the SPI serial interface mode. When SIM is ‘0’ (default value) the 4-wire
interface mode is selected. The data coming from the device are sent to SDO pad. In 3-wire
interface mode output data are sent to SDA_SDI pad.
BOOT bit is used to refresh the content of internal registers stored in the flash memory
block. At the device power up the content of the flash memory block is transferred to the
internal registers related to trimming functions to permit a good behavior of the device itself.
If for any reason the content of trimming registers is changed it is sufficient to use this bit to
restore correct values. When BOOT bit is set to ‘1’ the content of internal flash is copied
inside corresponding internal registers and it is used to calibrate the device. These values
are factory trimmed and they are different for every accelerometer. They permit a good
behavior of the device and normally they have not to be changed. At the end of the boot
process the BOOT bit is set again to ‘0’.
FDS bit enables (FDS=1) or bypass (FDS=0) the high pass filter in the signal chain of the
sensor
HP_coeff[2:1]. These bits are used to configure high-pass filter cut-off frequency ft.
Table 21.
SIM
BOOT
FDS
HP FF_WU2
HP_FF_WU1 High Pass filter enabled for Free-Fall/Wake-Up #1. Default value: 0
HP_coeff2
HP_coeff1
SIM
HP_coeff2,1
00
01
CTRL_REG2 (21h) register
CTRL_REG2 (21h) register description
High pass filter cut-off frequency configuration
BOOT
SPI Serial Interface Mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface)
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
Filtered Data Selection. Default value: 0
(0: internal filter bypassed; 1: data from internal filter sent to output register)
High Pass filter enabled for FreeFall/WakeUp # 2. Default value: 0
(0: filter bypassed; 1: filter enabled)
(0: filter bypassed; 1: filter enabled)
High pass filter cut-off frequency configuration. Default value: 00
(See table below)
--
Doc ID 15594 Rev 1
(DR=100 Hz)
ft (Hz)
FDS
2
1
HP_FF_
WU2
HP_FF_
WU1
(DR=400 Hz)
HP_coeff2 HP_coeff1
ft (Hz)
8
4
LIS35DE