ADIS16204BCCZ Analog Devices Inc, ADIS16204BCCZ Datasheet - Page 5

• Manufacturer Part Number: ADIS16204BCCZ
• Description: IC ACCEL DIGITAL HI-G 16-LGA
• Manufacturer: Analog Devices Inc

Specifications of ADIS16204BCCZ

• Acceleration Range: ±37g, 70g
• Axis: X, Y
• Sensitivity: 17.125 LSB/mg, 8.407 LSB/mg
• Voltage - Supply: 3 V ~ 3.6 V
• Output Type: Digital
• Bandwidth: 400Hz
• Interface: SPI
• Mounting Type: Surface Mount
• Package / Case: 16-LGA
• No. Of Axes: 2
• Sensor Case Style: LGA
• No. Of Pins: 16
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +105°C
• Svhc: No SVHC (18-Jun-2010)
• Family Name: ADIS16204
• Package Type: LGA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 8mm
• Product Height (mm): 5.2mm
• Product Length (mm): 8mm
• Mounting: Surface Mount
• Pin Count: 16
• Interface Type: SPI
• Sensitivity Per Axis: 17.125mg / LSB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADIS16204/PCBZ - BOARD EVAL FOR ADIS16204/PCB
• Lead Free Status / Rohs Status: Compliant

TIMING SPECIFICATIONS
T
Table 2.
Parameter
f
t
t
t
t
t
t
t
t
t
1
2
SCLK
DATARATE
CSHIGH
CS
DAV
DSU
DHD
DF
DR
SFS
Guaranteed by design; typical specifications are not tested or guaranteed.
Based on sample rate selection.
A
= +25°C, V
DOUT
SCLK
DIN
CS
CC
= +3.3 V, unless otherwise noted.
Description
Fast mode
Normal mode
Chip select period, fast mode
Chip select period, normal mode
Chip select high
Chip select to clock edge
Data output valid after SCLK edge
Data input setup time before SCLK rising edge
Data input hold time after SCLK rising edge
Data output fall time
Data output rise time
CS high after SCLK edge
t
CS
SCLK
1
CS
MSB
2
W/R
2
2
(Utilizing SPI Settings Typically Identified as Phase = 1, Polarity = 1)
DB14
t
DAV
t
DSU
3
2
A5
DB13
2
Figure 2. SPI Chip Select Timing
4
t
DHD
t
A4
DATARATE
DB12
Figure 3. SPI Timing
Rev. B | Page 5 of 24
5
A3
DB11
6
A2
DB10
Min
0.01
0.01
40
100
1/f
48.8
24.4
48.8
5
D2
DB2
SCLK
1
15
D1
DB1
Typ
5
5
16
LSB
LSB
Max
2.5
1.0
100
12.5
12.5
t
SFS
1
ADIS16204
Unit
MHz
MHz
μs
μs
ns
ns
ns
ns
ns
ns
ns