1323XNSK Freescale Semiconductor, 1323XNSK Datasheet - Page 3

KIT DEV FOR 1323X_NETWORK

1323XNSK

Manufacturer Part Number
1323XNSK
Description
KIT DEV FOR 1323X_NETWORK
Manufacturer
Freescale Semiconductor
Type
Transceiver, 802.15.4r
Datasheets

Specifications of 1323XNSK

Frequency
2.4GHz
Interface Type
SPI
For Use With/related Products
MC1323x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.2
Freescale Semiconductor
Fully compliant IEEE 802.15.4 Standard 2006 transceiver supports 250 kbps O-QPSK data in 5.0
MHz channels and full spread-spectrum encode and decode
— 2.4GHz
— Operates on one of 16 selectable channels per IEEE 802.15.4
— Programmable output power with 0 dBm nominal output power, programmable from -30 dBm
— Receive sensitivity of -94 dBm (typical) at 1% PER, 20-byte packet, much better than the IEEE
— Partial Power Down (PPD) “listen” mode available to reduce current while in receive mode and
Small RF footprint
— Integrated transmit/receive switch
— Differential input/output port (typically used with a balun)
— Low external component count
Hardware acceleration for IEEE
— DMA interface
— AES-128 Security module
— 16-Bit random number generator
— 802.15.4 Auto-sequence support
— 802.15.4 Receiver Frame filtering
32 MHz crystal reference oscillator; onboard load trim capability supplements external load
capacitors
Onboard 1 kHz oscillator for wake-up timing or an optional 32.768 kHz crystal for accurate low
power timing.
Transceiver Event Timer module has 4 timer comparators available to help manage the
auto-sequencer and to supplement MCU TPM resources
HCS08 8-bit, 32 MHz CPU
82 KB (81920
— 81920
— Programmable over the full power supply range of 1.8 - 3.6 V
— Automated program and erase algorithms
— Flexible protection scheme to prevent accidental program or erase
— Security feature to prevent unauthorized access to the FLASH
5 KB RAM
Powerful In-circuit debug and FLASH programming available via on-chip module (BDM)
— Two comparator and 9 trigger modes
— Eight deep FIFO for storing change-of-flow addresses and event-only data
Features Summary
to +3 dBm typical
802.15.4 Standard of -85 dBm
waiting for an incoming frame
dec
Bytes organized as 80 segments by 1024 bytes
dec)
FLASH memory
MC1323x Advance Information, Rev. 1.2
®
802.15.4 applications
3

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