1323XNSK Freescale Semiconductor, 1323XNSK Datasheet - Page 10

KIT DEV FOR 1323X_NETWORK

1323XNSK

Manufacturer Part Number
1323XNSK
Description
KIT DEV FOR 1323X_NETWORK
Manufacturer
Freescale Semiconductor
Type
Transceiver, 802.15.4r
Datasheets

Specifications of 1323XNSK

Frequency
2.4GHz
Interface Type
SPI
For Use With/related Products
MC1323x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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The primary system reference frequency is a 32 MHz crystal oscillator. The crystal requirements for the
oscillator and oscillator performance must support a +/-40 ppm frequency accuracy to meet the IEEE
802.15.4 Standard requirements. All system clocks are generated from this source. Features of the clock
system include:
An optional 32.768 kHz crystal oscillator is available for accurate low power timing and the Real Time
Clock (RTC). Also, an onboard, low accuracy 1 kHz oscillator is available for sleep timing wake-up.
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The MC1323x memory resources consist of RAM, FLASH program memory for nonvolatile data storage,
and control/status registers for I/O, peripherals, management, and the transceiver. Features include:
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— Direct — Operand in memory at 0x0000–0x00FF
— Extended — Operand anywhere in 64-KB address space
— Indexed relative to H:X — Five submodes including auto increment
— Indexed relative to SP — Improves C efficiency dramatically
Memory-to-memory data move instructions with four address mode combinations
Overflow, half-carry, negative, zero, and carry condition codes support conditional branching on
the results of signed, unsigned, and binary-coded decimal (BCD) operations
Efficient bit manipulation instructions
Fast 8-bit by 8-bit multiply and 16-bit by 8-bit divide instructions
STOP and WAIT instructions to invoke low-power operating modes
System Clocks
The 32 MHz reference oscillator has onboard programmable capacitive loading that allows
software tuning of frequency accuracy
CPU clock as high as 32 MHz
Bus clock (and peripheral clock) equals 1/2 CPU clock
Clocks to individual peripherals can be independently disabled for best power management.
CPU clock can be lowered to 500 kHz for lower power (250 kHz bus clock)
Memory
80 KB FLASH (81920
5 KB RAM
Security circuitry to prevent unauthorized access to RAM and FLASH contents
dec
) bytes organized as 80 segments of 1024 byte/segment)
MC1323x Advance Information, Rev. 1.2
Freescale Semiconductor

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