MPC8572EAMC Freescale Semiconductor, MPC8572EAMC Datasheet - Page 46

• Manufacturer Part Number: MPC8572EAMC
• Description: MPC8572 AMC RAPID SYSTEM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8572EAMC

• Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MPC8572E

MPC8572EAMC Functional Description
5.3.7
The MPC8572E microprocessor has integrated support for both PCI-Express and Serial RapidIO. To
support both PCI-E and SRIO standards, two high precision crystal oscillators are used, 100 MHz and
125 MHz. The AdvancedMC standard also requires that common clocking is supported via the fabric
clock interface, FCLKA.
differential clock input sources.
Table 5-14
is then fed into an ICS85411, 1-to-2 Differential-to-LVDS fan-out buffer. This buffer splits the LVDS input
clock out to the two SERDES interfaces on the MPC8572E. This logic is automatically handled by the
System CPLD logic.
5.3.8
The AdvancedMC clock port region is located on pins 74 through 82 on the AdvancedMC edge connector.
Differential synchronization clock 1 on pins 74/75, differential synchronization clock 2 on pins 77/78 and
differential synchronization clock 1 on pins 80/81. The AdvancedMC specification dictates that two types
of optional clock sources are provided to/from the board: four Telecom clocks and one Fabric clock. The
5-22
shows the truth table for the ICS854054 device. The selected differential LVDS clock output
MPC8572EAMC SERDES LVDS Clock (100/125MHZ)
MPC8572EAMC Clock Port Region
Figure 5-16. SERDES 100/125MHZ/FCLKA Clock Configuration
MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2
Figure 5-16
SEL1
0
0
1
1
Inputs
Table 5-14. ICS854054 Truth Table
SEL0
illustrates how the ICS854054 fan-out buffer connects to the three
0
1
0
1
PCLK0
PCLK1
PCLK2
PCLK3
Q
nPCLK0
nPCLK1
nPCLK2
nPCLK3
Outputs
nQ
125 MHz
100 MHz
Unused
FCLKA
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