MPC8572EAMC Freescale Semiconductor, MPC8572EAMC Datasheet - Page 39

• Manufacturer Part Number: MPC8572EAMC
• Description: MPC8572 AMC RAPID SYSTEM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8572EAMC

• Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MPC8572E

RapidIO Device ID TSEC2_TXD[2:4]
RapidIO System
Size
Memory Debug
Configuration
DDR Debug
Configuration
General Purpose
POR Configuration
SerDes1 Enable
SGMII SerDes
Enable
Engineering Use
POR Configuration
Freescale Semiconductor
POR Usage
(cfg_device_ID[5:7])
LGPL0
(Config_rio_sys_size)
DMA2_DACK[0],DMA1_DDONE[0]
(cfg_mem_debug[0:1])
DMA2_DDONE[0]
(cfg_ddr_debug)
LAD[0:31]
(cfg_gpinut[0:31])
TSEC2_TXD[5]
(cfg_srds1_en)
UART_RTS[1]
(cfg_srds_sgmii_en)
MSRCID[0], MSRCID[1]
(cfg_eng_use[0], cfg_eng_use[1])
Table 5-7. MPC8572E POR Configuration DEFAULT Settings (continued)
(Reset Configuration Name)
MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2
Functional Pin
Default
None
Chip
11
—
—
1
1
1
1
Setting
Board
000
11
—
—
0
1
1
1
Automatically configurable as
host or slave device ID via
System CPLD logic. If Host is set
(current default) RIO device ID =
000, if Agent mode RIO device ID
= 111. Other ID values possible
via UBoot.
Large system size (up to 65535
devices)
Debug information from the DDR
SDRAM controller2 is driven on
MSRCID and MDVAL
Debug information is not driven
on ECC pins.
General-Purpose POR
Configuration vector to be placed
in GPPORCR
SerDes 1 Interface is enabled
SGMII SerDes Interface is
enabled
Board Setup Description
MPC8572EAMC Functional Description
—
Automatically
selected
based on
Host/Slave
configuration
DIP Switches
Fixed
Default
assumed
Fixed
Fixed
Control
Method
—
—
5-15