IDTTSE2002B3CNRG IDT, Integrated Device Technology Inc, IDTTSE2002B3CNRG Datasheet
IDTTSE2002B3CNRG
Specifications of IDTTSE2002B3CNRG
Related parts for IDTTSE2002B3CNRG
IDTTSE2002B3CNRG Summary of contents
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Description The TSE2002B3C digital temperature sensor with accuracy up to ±0.5°C was designed to target applications demanding highest level of temperature readout. The device also contains 256 Byte EEPROM for storage of vendor information and system configuration such as ...
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Block Diagram: Temperature Sensor with EEPROM Temperature Registers T UPPER T LOWER Chipset T CRIT Resolution Capability and ID Registers Temperature Range Accuracy Event Feature Resolution Support Manufacturer ID Device ID Configuration Registers Resolution Hysteresis Event Status Event Polarity Event ...
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Maximum Ratings Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those ...
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AC Measurement Conditions Symbol Parameter C Load capacitance L Input rise and fall times Input levels Input and output timing reference levels AC Measurement I/O Waveform Input Parameters for the TSE2002B3C 1,2 Symbol Parameter C Input capacitance (SDA ...
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DC Characteristics Parameter Input Leakage Current (SCL, SDA) Output Leakage Current Supply Current, temp sensor converting, EEPROM write Supply Current, temp sensor shut down, EEPROM write Supply Current, temp sensor shut down, EEPROM read Supply Current, temp sensor converting, EEPROM ...
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AC Characteristics Parameter Clock Frequency Clock Pulse Width High Time Clock Pulse Width Low Time Detect clock low timeout, Capabilities Register bit 6 =1 SDA Rise Time SDA Fall Time Data In Setup Time Data In Hold Time Data Out ...
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Temperature-to-Digital Conversion Performance Parameter Temperature Sensor Accuracy (exceeds JEDEC B-grade < V < V DDSPDMIN DDSPD Temperature Conversion Time Resolution ADC Setting 0.5°C 0.25°C (POR default) 0.125°C 0.0625°C AC Waveforms Min Typ Max Unit ±0.5 ±1.0 °C -20°C ...
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Pin Assignment 1 SA0 SA1 3 6 SA2 SSSPD Pin Description Pin # Pin Name 1 SA0 2 SA1 3 SA2 4 V SSSPD 5 SDA 6 SCL 7 EVENT 8 V DDSPD Pin ...
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Maximum R Value vs. Bus Capacitance (C L Select Address (SA0, SA1, SA2) These input signals are used to set the value that looked for on the three least significant bits (b3, b2, b1) of the 7-bit ...
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EVENT Pin Mode Functionality Serial Communications The SPD section of the TSE2002B3C Kbit serial EEPROM organized as a 256 byte memory. The device is able to lock permanently the data in the lower sector (from location 0x00 ...
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Device Diagram Device Interface The TSE2002B3C behaves as a slave device in the I operations are initiated by a START condition, generated by the bus master. The START condition is followed by a Device Select Code and R/W# bit 2 ...
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I C Bus Protocol Start Condition Start is identified by a falling edge of Serial Data (SDA) while Serial Clock (SCL) is stable in the High state. A Start condition must precede any data transfer command. The device continuously ...
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No Acknowledge Bit (NACK) The no-acknowledge bit is used to indicate the completion of a block read operation attempt to modify a write-protected register. The bus master releases Serial Data (SDA) after sending eight bits of data, and ...
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I C Operating Modes Mode SPD Current Address Read SPD Random Address Read SPD Sequential Read SPD Byte Write SPD Page Write TS Write TS Read Device Reset and Initialization In order to prevent inadvertent Write operations during Power-up, ...
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Software Write Protect The TSE2002B3C has three software write-protection features, allowing the bottom half of the memory area (addresses 0x00 to 0x7F temporarily or permanently write protected. Software write-protection is handled by three instructions: SWP: Set Write Protection ...
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Setting the Write Protection Reading Write Protection Status The status of software write protection can be determined using these instructions: Read SWP: Read Write Protection Status • Read PSWP: Read Permanently Set Write Protection Status • Read SWP The controller ...
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Write Mode Sequences in a Non-Write Protected Area Byte Write After the Device Select Code and the address byte, the bus master sends one data byte. If the addressed location is write-protected, the device replies to the data byte with ...
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Write Cycle Polling Flowchart Using ACK Read Operations Read operations are performed independent of the software protection state. The device has an internal address counter which is incremented each time a byte is read May 12, 2010 ...
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Read Mode Sequences Random Address Read A dummy Write is first performed to load the address into this address counter (refer to the Read Mode Sequence figure) but without sending a Stop condition. Then, the bus master sends another Start ...
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Sequential Read This operation can be used after a Current Address Read or a Random Address Read. The bus master does acknowledge the data byte output, and sends additional clock pulses so that the device continues to output the next ...
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TS Write Operations Writing to the TSE2002B3C Temperature Register Set is accomplished through a modified block write operation for two (2) data bytes. To maintain compatibility, the 16 bit register is accessed through a pointer register, requiring ...
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I C Write to Pointer Register Preset Pointer Register Word Read Pointer Write Register Word Read TS Register Set Definition The register set address are shown in the Acknowledge When Writing Data or ...
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Temperature Register Addresses ADDR R/W Name N/A W Address Pointer 00 R Capabilities 01 R/W Configuration 02 R/W High Limit 03 R/W Low Limit 04 R/W TCRIT Limit 05 R Ambient Temperature 06 R Manufacturer Device/Revision 08 ...
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TRES Bit Decode TRES[1: 0.5°C (9-bit 0.25°C (10-bit) (default 0.125°C (11-bit 0.0625°C (12-bit) Note: Refer to section Resolution Register on page 28. Bit 2 - RANGE; Indicates the supported temperature ...
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HYST Bit Decode HYST[1: Disable hysteresis (default 1.5° 3° 6°C Bit 8 – SHDN-Shutdown. The thermal sensing device and A/D converters are disabled to save power, no events will be ...
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The EVENT pin is active low. The “active” state of the pin will be logical '0'. '1'; The EVENT pin is active high. The “active” state of the pin will be logical '1'. Bit 0 – EVENT_MODE; Controls ...
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Low Limit Register Low Limit Register ADDR R/W B15/B7 B14/B6 – – The Low Limit Register holds the lower limit for the nominal operating window. When the temperature drops below the Low Limit or rises up ...
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Manufacturer ID Register Manufacturer ID Register ADDR R/W B15/B7 B14/ R The Manufacturer ID Register holds the PCI SIG number assigned to the specific manufacturer. Device ID/Revision Register Device ID/Revision Register ADDR R/W B15/B7 B14/B6 ...
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Use in a Memory Module In the Dual Inline Memory Module (DIMM) application, the TSE2002B3C is soldered directly onto the printed circuit module. The three Select Address inputs (SA0, SA1, SA2) must be connected to V DIMM socket (as shown ...
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Ordering Information XXXX X X TSE Voltage Device Type Temp Range Example: TSE2002B3C NRG8 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 ® XXX Shipping Rev. Package Carrier Tape and Reel 8 NCG - Green ...