MC13783VK5 Freescale Semiconductor, MC13783VK5 Datasheet - Page 18

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MC13783VK5

Manufacturer Part Number
MC13783VK5
Description
IC PWR MNGMNT ATLAS 3G 247MAPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC13783VK5

Applications
Handheld/Mobile Devices
Operating Temperature
-30°C ~ 85°C
Mounting Type
*
Package / Case
247-MAPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Voltage - Supply
-

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Functional Description
4.1.1.2
The register set is given in
4.1.1.3
4.1.1.3.1
The operation of both SPI interfaces is equivalent. Therefore, all SPI bus names without prefix PRI or SEC
correspond to both the PRISPI and SECSPI interfaces.
The control bits are organized into 64 fields. Each of these 64 fields contains 32 bits. A maximum of 24
data bits is used per field. In addition, there is one “dead” bit between the data and address fields. The
remaining bits include 6 address bits to address the 64 data fields and one write enable bit to select whether
the SPI transaction is a read or a write.
For each SPI transfer, first a one is written to the read/write bit if this SPI transfer is to be a write. A zero
is written to the read/write bit if this is to be a read command only. If a zero is written, then any data sent
after the address bits are ignored and the internal contents of the field addressed do not change when the
32nd CLK is sent. Next the 6-bit address is written, MSB first. Finally, data bits are written, MSB first.
Once all the data bits are written then the data is transferred into the actual registers on the falling edge of
the 32nd CLK.
18
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Interrupt Status 0
Interrupt Mask 0
Interrupt Sense 0
Interrupt Status 1
Interrupt Mask 1
Interrupt Sense 1
Power Up Mode Sense
Identification
Semaphore
Arbitration Peripheral Audio
Arbitration Switchers
Arbitration Regulators 0
Arbitration Regulators 1
Power Control 0
Power Control 1
Power Control 2
Register
Register Set
Interface Requirements
SPI Interface Description
Table
5.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
MC13783 Technical Data, Rev. 3.5
Regen Assignment
Control Spare
Memory A
Memory B
RTC Time
RTC Alarm
RTC Day
RTC Day Alarm
Switchers 0
Switchers 1
Switchers 2
Switchers 3
Switchers 4
Switchers 5
Regulator Setting 0
Regulator Setting 1
Register
Table 5. Register Set
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
Regulator Mode 0
Regulator Mode 1
Power Miscellaneous
Power Spare
Audio Rx 0
Audio Rx 1
Audio Tx
SSI Network
Audio Codec
Audio Stereo DAC
Audio Spare
ADC 0
ADC 1
ADC 2
ADC 3
ADC 4
Register
Freescale Semiconductor
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
Register
Charger
USB 0
Charger USB 1
LED Control 0
LED Control 1
LED Control 2
LED Control 3
LED Control 4
LED Control 5
Spare
Trim 0
Trim 1
Test 0
Test 1
Test 2
Test 3

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