PCF85176T/1,118 NXP Semiconductors, PCF85176T/1,118 Datasheet - Page 15

• Manufacturer Part Number: PCF85176T/1,118
• Description: IC LCD DISPLAY DVR 40SEG 56TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCF85176T/1,118

• Package / Case: 56-TFSOP (0.240", 6.10mm Width)
• Display Type: LCD
• Configuration: 40 Segment
• Interface: I²C
• Current - Supply: 20µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Digits: 20
• Number Of Segments: 40
• Maximum Clock Frequency: 2640 Hz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 95 C
• Attached Touch Screen: No
• Maximum Supply Current: 20 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-5933-2; PCF85176T/1,118

NXP Semiconductors
PCF85176_1
Product data sheet
7.10 Display RAM
The display RAM is a static 40 × 4-bit RAM which stores LCD data.
There is a one-to-one correspondence between
A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element;
similarly, a logic 0 indicates the off-state.
The display RAM bit map,
backplane outputs BP0 to BP3, and the columns 0 to 39 which correspond with the
segment outputs S0 to S39. In multiplexed LCD applications the segment data of the first,
second, third and fourth row of the display RAM are time-multiplexed with BP0, BP1, BP2,
and BP3 respectively.
When display data is transmitted to the PCF85176 the display bytes received are stored in
the display RAM in accordance with the selected LCD drive mode. The data is stored as it
arrives and does not wait for an acknowledge cycle as with the commands. Depending on
the current multiplex drive mode, data is stored singularly, in pairs, triples or quadruples.
To illustrate the filling order, an example of a 7-segment numeric display showing all drive
modes is given in
LCD types.
Fig 10. Display RAM bit map
•
•
•
•
In static drive mode the same signal is carried by all four backplane outputs and they
can be connected in parallel for very high drive requirements.
the bits in the RAM bitmap and the LCD elements
the RAM columns and the segment outputs
the RAM rows and the backplane outputs.
backplane outputs
display RAM bits
The display RAM bitmap shows the direct relationship between the display RAM column and the
segment outputs; and between the bits in a RAM row and the backplane outputs.
(rows)/
(BP)
All information provided in this document is subject to legal disclaimers.
Figure
0
1
2
3
Rev. 01 — 14 April 2010
0
11; the RAM filling organization depicted applies equally to other
Figure
1
2
display RAM addresses (columns)/segment outputs (S)
10, shows the rows 0 to 3 which correspond with the
3
4
Universal LCD driver for low multiplex rates
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PCF85176
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© NXP B.V. 2010. All rights reserved.
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