RC28F256P33TFA NUMONYX, RC28F256P33TFA Datasheet - Page 39

• Manufacturer Part Number: RC28F256P33TFA
• Description: IC FLASH 256MBIT 95NS 64EZBGA
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of RC28F256P33TFA

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 256M (16Mx16)
• Speed: 95ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-EZBGA
• Cell Type: NOR
• Density: 256Mb
• Interface Type: Parallel/Serial
• Boot Type: Top
• Address Bus: 25b
• Operating Supply Voltage (typ): 2.5/3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: EZBGA
• Sync/async: Async/Sync
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 32M
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 902063; 902063; RC28F256P33TF 902063

P33-65nm
Table 14: WAIT Functionality Table
11.1.6
11.1.7
Table 15: Burst Sequence Word Ordering (Sheet 1 of 2)
Datasheet
39
CE# = ‘1’, OE# = ‘X’ or CE# = ‘0’, OE# = ‘1’
CE# =’0’, OE# = ‘0’
Synchronous Array Reads
Synchronous Non-Array Reads
All Asynchronous Reads
All Writes
Notes:
1.
2.
(DEC)
Addr.
Start
14
15
0
1
2
3
4
5
6
7
Active: WAIT is asserted until data becomes valid, then deasserts.
When OE# = V
(RCR.3)
Burst
Wrap
0
0
0
0
0
0
0
0
0
0
WAIT Delay
The WAIT Delay (WD) bit controls the WAIT assertion-delay behavior during
synchronous burst reads. WAIT can be asserted either during or one data cycle before
valid data is output on DQ[15:0]. When WD is set, WAIT is deasserted one data cycle
before valid data (default). When WD is cleared, WAIT is deasserted during valid data.
Burst Sequence
The Burst Sequence (BS) bit selects linear-burst sequence (default). Only linear-burst
sequence is supported.
lengths, as well as the effect of the Burst Wrap (BW) setting.
IH
(BL[2:0] = 0b001)
during writes, WAIT = High-Z.
4-Word Burst
Condition
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
Table 15
(BL[2:0] = 0b010)
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
8-Word Burst
Burst Addressing Sequence (DEC)
shows the synchronous burst sequence for all burst
Active
Active
Deasserted
High-Z
High-Z
Active
5-6-7-8-9…15-0-1-2-3-
4-5-6-7-8…15-0-1-2-3
6-7-8-9-10…15-0-1-2-
7-8-9-10…15-0-1-2-3-
(BL[2:0] = 0b011)
3-4-5-6-7…15-0-1-2
14-15-0-1-2…12-13
15-0-1-2-3…13-14
2-3-4-5-6…15-0-1
0-1-2-3-4…14-15
16-Word Burst
1-2-3-4-5…15-0
3-4-5
4-5-6
4
WAIT
Order Number:320003-09
14-15-16-17-18-19-20-
15-16-17-18-19-20-21-
(BL[2:0] = 0b111)
7-8-9-10-11-12-13…
6-7-8-9-10-11-12-…
Continuous Burst
5-6-7-8-9-10-11…
4-5-6-7-8-9-10…
0-1-2-3-4-5-6-…
1-2-3-4-5-6-7-…
2-3-4-5-6-7-8-…
3-4-5-6-7-8-9-…
…
…
Notes
Mar 2010
1,2
1
1
1
1
1