IDT70V3319S133BF IDT, Integrated Device Technology Inc, IDT70V3319S133BF Datasheet - Page 6

• Manufacturer Part Number: IDT70V3319S133BF
• Description: IC SRAM 4MBIT 133MHZ 208FBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT70V3319S133BF

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 4M (256K x 18)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 70V3319S133BF

Truth Table I—Read/Write and Enable Control
NOTES:
1. "H" = V
2. ADS, CNTEN, REPEAT = X.
3. OE is an asynchronous input signal.
Truth Table II—Address Counter Control
NOTES:
1. "H" = V
2. Read and write operations are controlled by the appropriate setting of R/W, CE
3. Outputs configured in flow-through output mode: if outputs are in pipelined mode the date out will be delayed by one cycle.
4. ADS and REPEAT are independent of all other memory control signals including CE
5. The address counter advances if CNTEN = V
6. When REPEAT is asserted, the counter will reset to the last valid address loaded via ADS. This value is not set at power-up: a known location should be loaded
IDT70V3319/99S
High-Speed 3.3V 256/128K x 18 Dual-Port Synchronous Static RAM
Address
External
OE
via ADS during initialization if desired. Any subsequent ADS access during operations will update the REPEAT address location.
X
X
X
X
X
X
H
L
L
L
An
An
X
X
IH,
IH,
"L" = V
"L" = V
CLK
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
Previous
Address
Internal
Ap
Ap
X
X
IL,
IL,
"X" = Don't Care.
"X" = Don't Care.
CE
H
X
L
L
L
L
L
L
L
L
0
Address
Internal
Ap + 1
Used
Ap
An
An
CE
X
H
H
H
H
H
H
H
H
L
1
CLK
↑
↑
↑
↑
UB
X
X
H
H
H
L
L
L
L
L
IL
ADS
on the rising edge of CLK, regardless of all other memory control signals including CE
X
L
H
H
(4)
LB
CNTEN
X
X
H
H
H
L
L
L
L
L
X
X
H
L
(5)
R/W
REPEAT
X
X
X
H
H
H
X
L
L
L
L
H
H
H
(4)
(6)
6.42
Upper Byte
6
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
0
I/O
D
D
, CE
D
D
D
D
D
OUT
OUT
D
I/O
I/O
9-17
IN
IN
I/O
I/O
I/O
(p+1)
0
1
(p)
, CE
(3)
(0)
, UB, LB and OE.
(n)
(1,2)
1
and UB, LB.
Counter Reset to last valid ADS load
External Address Used
External Address Blocked—Counter disabled (Ap reused)
Counter Enabled—Internal Address generation
Lower Byte
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
I/O
(1,2,3)
D
D
Industrial and Commercial Temperature Ranges
D
D
OUT
OUT
IN
IN
0-8
Deselected–Power Down
Deselected–Power Down
Both Bytes Deselected
Read Lower Byte Only
Read Upper Byte Only
Read Both Bytes
Outputs Disabled
Write to Lower Byte Only
Write to Upper Byte Only
Write to Both Bytes
MODE
MODE
0
, CE
1
, UB, LB.
5623 tbl 02
5623 tbl 03