IDT70V3319S133BF IDT, Integrated Device Technology Inc, IDT70V3319S133BF Datasheet - Page 16

• Manufacturer Part Number: IDT70V3319S133BF
• Description: IC SRAM 4MBIT 133MHZ 208FBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT70V3319S133BF

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 4M (256K x 18)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 70V3319S133BF

Timing Waveform of Flow-Through Read-to-Write-to-Read (OE = V
NOTES:
1. Output state (High, Low, or High-impedance) is determined by the previous cycle control signals.
2. CE
3. Addresses do not have to be accessed sequentially since ADS = V
4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity.
Timing Waveform of Flow-Through Read-to-Write-to-Read (OE Controlled)
IDT70V3319/99S
High-Speed 3.3V 256/128K x 18 Dual-Port Synchronous Static RAM
ADDRESS
reference use only.
DATA
ADDRESS
DATA
0
, UB, LB, and ADS = V
DATA
UB, LB
DATA
CLK
R/
CE
CE
UB, LB
OUT
OE
W
IN
CLK
R/
CE
CE
0
1
OUT
(3)
W
IN
0
1
(3)
(1)
t
t
t
t
(1)
SB
SW
SC
SA
t
t
t
t
An
SB
SC
SW
SA
t
IL
t
t
t
An
HW
HC
HB
HA
; CE
t
t
CH1
t
t
t
CD1
t
HW
HC
HA
HB
t
t
CH1
1
CD1
t
, CNTEN, and REPEAT = V
CYC1
READ
t
CYC1
t
CL1
READ
Qn
t
CL1
An +1
Qn
An +1
t
DC
t
DC
t
OHZ
t
CD1
IH
t
t
.
SW
SD
Dn + 2
An + 2
Qn + 1
IL
An + 2
t
t
HD
constantly loads the address on the rising edge of the CLK; numbers are for
HW
6.42
16
NOP
t
CKHZ
WRITE
(5)
An + 3
Dn + 3
t
t
SW
SD
Dn + 2
An + 2
t
t
HD
HW
WRITE
Industrial and Commercial Temperature Ranges
An + 4
t
An + 3
CKLZ
t
OE
t
CD1
t
CD1
t
CKLZ
READ
Qn + 4
READ
An + 5
Qn + 3
An + 4
t
DC
t
t
DC
CD1
t
CD1
5623 drw 15
6523 drw 14
IL
)
(2)
(2)