MPC8533EVTARJA Freescale Semiconductor, MPC8533EVTARJA Datasheet - Page 7

• Manufacturer Part Number: MPC8533EVTARJA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

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4.1
4.2
4.2.1
4.2.2
4.3
4.3.1
4.3.1.1
4.3.1.1.1
4.3.1.1.2
4.3.1.2
4.3.1.2.1
4.3.1.2.2
4.3.1.3
4.3.1.3.1
4.3.2
4.4
4.4.1
4.4.1.1
4.4.1.2
4.4.2
4.4.3
4.4.3.1
4.4.3.2
4.4.3.3
4.4.3.4
4.4.3.5
4.4.3.6
4.4.3.7
4.4.3.8
4.4.3.9
4.4.3.10
4.4.3.11
4.4.3.12
4.4.3.13
4.4.3.14
4.4.3.15
4.4.3.16
4.4.3.17
4.4.3.18
4.4.3.19
4.4.3.20
Freescale Semiconductor
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Overview.......................................................................................................................... 4-1
External Signal Descriptions ........................................................................................... 4-1
Memory Map/Register Definition ................................................................................... 4-4
Functional Description..................................................................................................... 4-8
System Control Signals................................................................................................ 4-2
Clock Signals ............................................................................................................... 4-3
Local Configuration Control........................................................................................ 4-4
Boot Sequencer ............................................................................................................ 4-8
Reset Operations .......................................................................................................... 4-8
Power-On Reset Sequence........................................................................................... 4-9
Power-On Reset Configuration.................................................................................. 4-10
Accessing Configuration, Control, and Status Registers......................................... 4-4
Accessing Alternate Configuration Space ............................................................... 4-6
Boot Page Translation.............................................................................................. 4-7
Soft Reset................................................................................................................. 4-8
Hard Reset ............................................................................................................... 4-8
System PLL Ratio.................................................................................................. 4-11
e500 Core PLL Ratio ............................................................................................. 4-12
SEC Frequency Ratio Configuration ..................................................................... 4-13
Boot ROM Location .............................................................................................. 4-13
Host/Agent Configuration ..................................................................................... 4-14
I/O Port Selection .................................................................................................. 4-14
CPU Boot Configuration ....................................................................................... 4-15
Boot Sequencer Configuration .............................................................................. 4-16
DDR SDRAM Type............................................................................................... 4-17
eTSEC1 Width ....................................................................................................... 4-17
eTSEC3 Width ....................................................................................................... 4-17
eTSEC1 Protocol ................................................................................................... 4-18
eTSEC3 Protocol ................................................................................................... 4-18
PCI Clock Selection............................................................................................... 4-19
PCI Speed Configuration ....................................................................................... 4-19
PCI I/O Impedance ................................................................................................ 4-20
PCI Arbiter Configuration ..................................................................................... 4-20
Memory Debug Configuration .............................................................................. 4-20
DDR Debug Configuration.................................................................................... 4-20
General-Purpose POR Configuration .................................................................... 4-21
Updating CCSRBAR ........................................................................................... 4-4
Configuration, Control, and Status Base Address Register (CCSRBAR)........... 4-5
Alternate Configuration Base Address Register (ALTCBAR)............................ 4-6
Alternate Configuration Attribute Register (ALTCAR)...................................... 4-6
Boot Page Translation Register (BPTR).............................................................. 4-7
Contents
Title
Number
Page
vii