PSMN7R0-40LS,115 NXP Semiconductors, PSMN7R0-40LS,115 Datasheet - Page 9

• Manufacturer Part Number: PSMN7R0-40LS,115
• Description: MOSFET N-CH 40V QFN3333
• Manufacturer: NXP Semiconductors

Specifications of PSMN7R0-40LS,115

• Input Capacitance (ciss) @ Vds: 1286pF @ 12V
• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Standard
• Rds On (max) @ Id, Vgs: 7 mOhm @ 10A, 10V
• Drain To Source Voltage (vdss): 40V
• Current - Continuous Drain (id) @ 25° C: 40A
• Vgs(th) (max) @ Id: 4V @ 1mA
• Gate Charge (qg) @ Vgs: 21.4nC @ 10V
• Power - Max: 65W
• Mounting Type: Surface Mount
• Package / Case: 8-VDFN Exposed Pad
• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 7 mOhms
• Drain-source Breakdown Voltage: 40 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 40 A
• Power Dissipation: 65 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5595-2

NXP Semiconductors
PSMN5R8-40YS
Product data sheet
Fig 13. Drain-source on-state resistance as a function
Fig 15. Gate-source voltage as a function of gate
(mΩ)
R
V
(V)
DSon
GS
25
20
15
10
10
5
0
8
6
4
2
0
of drain current; typical values
charge; typical values
0
0
10
25
20V
20
V
GS
50
(V) = 5.5
30
V
DS
= 32V
75
40
All information provided in this document is subject to legal disclaimers.
003aae230
003aae228
Q
I
D
G
(A)
(nC)
6.5
10
6
7
Rev. 03 — 25 October 2010
100
50
N-channel LFPAK 40 V 5.7 mΩ standard level MOSFET
Fig 14. Gate charge waveform definitions
Fig 16. Input, output and reverse transfer capacitances
(pF)
C
10
10
10
4
3
2
10
as a function of drain-source voltage; typical
values
V
-2
V
V
V
GS(pl)
DS
GS(th)
GS
10
Q
GS1
-1
I
Q
PSMN5R8-40YS
D
GS
Q
GS2
1
Q
G(tot)
Q
GD
10
© NXP B.V. 2010. All rights reserved.
V
003aaa508
003aae227
DS
C
C
C
(V)
oss
iss
rss
10
2
9 of 15