A3PE1500-FGG676 Actel, A3PE1500-FGG676 Datasheet - Page 41

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A3PE1500-FGG676

Manufacturer Part Number
A3PE1500-FGG676
Description
FPGA - Field Programmable Gate Array 1500K System Gates
Manufacturer
Actel
Datasheet

Specifications of A3PE1500-FGG676

Processor Series
A3PE1500
Core
IP Core
Maximum Operating Frequency
231 MHz
Number Of Programmable I/os
444
Data Ram Size
276480
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
1.5 M
Package / Case
FPBGA-676
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3PE1500-FGG676
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A3PE1500-FGG676
Manufacturer:
MICROSEMI/美高森美
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Part Number:
A3PE1500-FGG676I
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Table 2-32 • 3.3 V LVTTL / 3.3 V LVCMOS Low Slew
Drive
Strength
100 µA
100 µA
100µA
100 µA
100 µA
Notes:
1. Please note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will NOT
2. Software default selection highlighted in gray.
3. For specific junction temperature and voltage supply levels, refer to
operate at the equivalent software default drive strength. These values are for Normal Ranges ONLY.
Equivalent
Software
Default
Drive
Strength
Option
Commercial-Case Conditions: T
12 mA
16 mA
24 mA
4 mA
8 mA
1
Speed
Grade t
Std.
Std.
Std.
Std.
Std.
–1
–2
–1
–2
–1
–2
–1
–2
–1
–2
DOUT
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
17.02 0.04 1.83 2.38 0.43 17.02 13.74 4.16 3.78 20.42 17.14
14.48 0.04 1.55 2.02 0.36 14.48 11.69 3.54 3.21 17.37 14.58
12.71 0.03 1.36 1.78 0.32 12.71 10.26 3.11 2.82 15.25 12.80
12.16 0.04 1.83 2.38 0.43 12.16 9.78 4.70 4.74 15.55 13.17
10.34 0.04 1.55 2.02 0.36 10.34 8.32 4.00 4.03 13.23 11.20
9.08
9.32
7.93
6.96
8.69
7.39
6.49
6.90
6.05
8.11
t
DP
J
0.03 1.36 1.78 0.32
0.04 1.83 2.38 0.43
0.04 1.55 2.02 0.36
0.03 1.36 1.78 0.32
0.04 1.83 2.38 0.43
0.04 1.55 2.02 0.36
0.03 1.36 1.78 0.32
0.04 1.83 2.38 0.43
0.04 1.55 2.02 0.36
0.03 1.36 1.78 0.32
t
DIN
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
t
PY
R e v i s i o n 9
t
PYS
t
EOUT
Table 2-6 on page 2-5
9.08
7.39
9.32
7.93
6.96
8.69
6.49
8.11
6.90
6.05
t
ZL
7.30 3.51 3.54 11.61 9.84
7.62 5.06 5.36 12.71 11.02
6.48 4.31 4.56 10.81 9.37
5.69 3.78 4.00 9.49
7.17 5.14 5.53 12.08 10.57
6.10 4.37 4.71 10.28 8.99
5.36 3.83 4.13 9.02
7.13 5.23 6.13 11.50 10.52
6.06 4.45 5.21 9.78
5.32 3.91 4.57 8.59
t
ZH
t
LZ
for derating values.
ProASIC3E Flash Family FPGAs
t
HZ
t
ZLS
t
8.23
7.89
8.95
7.86
ZHS
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2- 29

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