A54SX08A-TQG100 Actel, A54SX08A-TQG100 Datasheet - Page 25
![FPGA - Field Programmable Gate Array 12K System Gates](/photos/16/14/161495/tqfp-100_sml.jpg)
A54SX08A-TQG100
Manufacturer Part Number
A54SX08A-TQG100
Description
FPGA - Field Programmable Gate Array 12K System Gates
Manufacturer
Actel
Datasheet
1.A54SX08A-TQG100.pdf
(108 pages)
Specifications of A54SX08A-TQG100
Processor Series
A54SX08
Core
IP Core
Number Of Macrocells
512
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
130
Delay Time
4 ns to 8.4 ns
Supply Voltage (max)
5.25 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
2.25 V
Number Of Gates
8000
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A54SX08A-TQG100
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A54SX08A-TQG100
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
Company:
Part Number:
A54SX08A-TQG100A
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A54SX08A-TQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Figure 2-1
Figure 2-1 • 5 V PCI V/I Curve for SX-A Family
Table 2-9 • DC Specifications (3.3 V PCI Operation)
Symbol
V
V
V
V
I
I
V
V
C
C
Notes:
1. This specification should be guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a
2. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
3. Absolute maximum pin capacitance for a PCI input is 10 pF (except for CLK).
IPU
IL
CCA
CCI
IH
IL
OH
OL
IN
CLK
I
for V
OH
floated network. Designers should ensure that the input buffer is conducting minimum current at this input voltage in applications
sensitive to static power utilization.
= 11.9 * (V
CCI
shows the 5 V PCI V/I curve and the minimum and maximum PCI drive characteristics of the SX-A family.
> V
Parameter
Supply Voltage for Array
Supply Voltage for I/Os
Input High Voltage
Input Low Voltage
Input Pull-up Voltage
Input Leakage Current
Output High Voltage
Output Low Voltage
Input Pin Capacitance
CLK Pin Capacitance
–100.0
–150.0
–200.0
OUT
200.0
150.0
100.0
–50.0
50.0
OUT
0.0
> 3.1V
0
– 5.25) * (V
I OL MAX Spec
I OH MIN Spec
0.5
1
OUT
3
2
+ 2.45)
1
I OH
1.5
2
I OL
EQ 2-1
Voltage Out (V)
2.5
v5.3
3
I
for 0V < V
Condition
0 < V
I
I
OL
OUT
OUT
I OL MIN Spec
= 78.5 * V
= –500 µA
= 1,500 µA
IN
3.5
< V
OUT
CCI
OUT
< 0.71V
4
* (4.4 – V
4.5
I OH MAX Spec
0.5V
0.7V
0.9V
Min.
OUT
2.25
–0.5
–10
3.0
–
5
5
CCI
CCI
CCI
)
5.5
V
SX-A Family FPGAs
0.3V
0.1V
CCI
Max.
2.75
+10
3.6
10
12
–
–
+ 0.5
CCI
CCI
6
Units
EQ 2-2
μA
pF
pF
V
V
V
V
V
V
V
2-5