PCA9501D,118 NXP Semiconductors, PCA9501D,118 Datasheet - Page 6

• Manufacturer Part Number: PCA9501D,118
• Description: I/O Expanders, Repeaters & Hubs 8BIT I2C FMQB GPIONT PU2K EPR
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of PCA9501D,118

• Logic Family: PCA9501
• Number Of Lines (input / Output): 8.0 / 8.0
• Operating Supply Voltage: 2.5 V to 3.6 V
• Power Dissipation: 400 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5 V
• Logic Type: I/O Expander
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8.0
• Number Of Output Lines: 8.0
• Output Current: 25 mA
• Output Voltage: 5 V
• Package / Case: SO-20
• Mounting Type: Surface Mount
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Interface: I²C, SMBus
• Number Of I /o: 8
• Frequency - Clock: 400kHz
• Interrupt Output: Yes
• Includes: EEPROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935272364118 PCA9501D-T

NXP Semiconductors
PCA9501_4
Product data sheet
Fig 7.
Fig 8.
read from
data into
SDA
port
port
INT
write to port
data out from port
I/O Write mode (output)
I/O Read mode (input)
SCL
S
START condition
SDA
slave address (I/O expander)
SCL
1
0
7.2 Control register
7.3 I/O operations
S
START condition
A5 A4 A3 A2 A1 A0
2
t
v(INT)
slave address (I/O expander)
1
0
3
The PCA9501 contains a single 8-bit register called the Control register, which can be
written and read via the I
of the slave address.
It contains the I/O operation information.
(Refer also to
Each of the PCA9501's eight I/Os can be independently used as an input or output.
Output data is transmitted to the port by the I/O Write mode (see
is transferred from the port to the microcontroller by the Read mode (see
A5 A4 A3 A2 A1 A0 1
2
4
3
DATA 1
5
4
6
5
7
R/W
6
8
0
Figure
7
t
9
h(D)
A
acknowledge
from slave
R/W
8
9
5.)
Rev. 04 — 10 February 2009
8-bit I
A
acknowledge
from slave
2
C-bus. This register is sent after a successful acknowledgment
data to port
DATA 1
DATA 2
2
C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM
data from port
DATA 1
DATA 3
t
v(Q)
t
su(D)
A
acknowledge
from slave
A
acknowledge
from master
t
rst(INT)
data to port
DATA 1 VALID
DATA 2
data from port
DATA 4
DATA 4
t
v(Q)
Figure
A
acknowledge
from slave
PCA9501
© NXP B.V. 2009. All rights reserved.
DATA 2 VALID
7). Input I/O data
Figure
1
no acknowledge
from master
002aad290
002aad291
P
STOP
condition
8).
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