WM8351GEB/V Wolfson Microelectronics, WM8351GEB/V Datasheet - Page 203
![no-image](/images/manufacturer_photos/0/7/716/wolfson_microelectronics_sml.jpg)
WM8351GEB/V
Manufacturer Part Number
WM8351GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8351GEBV.pdf
(328 pages)
Specifications of WM8351GEB/V
Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPS
Interface Type
Serial (2-Wire, 3-Wire, 4-Wire)
Resolution
12 bit
Operating Supply Voltage
3.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA
Minimum Operating Temperature
- 25 C
Number Of Channels
2 ADC/2 DAC
Supply Current
260 uA
Thd Plus Noise
- 83 dB
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
8
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
95dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 203 of 328
- Download datasheet (3Mb)
Production Data
w
24.3.6
The first-level GP_INT interrupt comprises several second-level interrupts for the 13 GPIO pins. Each
of these has a status bit in Register R30 and a mask bit in Register R35, as defined in Table 147.
R30 (1Eh)
GPIO Interrupt
Status
R38 (26h)
GPIO Interrupt
Mask
Table 147 GPIO Interrupts
ADDRESS
GPIO INTERRUPTS
12:0
BIT
12
11
10
9
8
7
6
5
4
3
2
1
0
GP12_EINT
GP11_EINT
GP10_EINT
GP9_EINT
GP8_EINT
GP7_EINT
GP6_EINT
GP5_EINT
GP4_EINT
GP3_EINT
GP2_EINT
GP1_EINT
GP0_EINT
“IM_” + name of respective bit
in R30
LABEL
GPIO12 interrupt.
(Trigger controlled by GP12 registers.)
Note: This bit is cleared once read.
GPIO11 interrupt.
(Trigger controlled by GP11 registers.)
Note: This bit is cleared once read.
GPIO10 interrupt.
(Trigger controlled by GP10 registers.)
Note: This bit is cleared once read.
GPIO9 interrupt.
(Trigger controlled by GP9 registers.)
Note: This bit is cleared once read.
GPIO8 interrupt.
(Trigger controlled by GP8 registers.)
Note: This bit is cleared once read.
GPIO7 interrupt.
(Trigger controlled by GP7 registers.)
Note: This bit is cleared once read.
GPIO6 interrupt.
(Trigger controlled by GP6 registers.)
Note: This bit is cleared once read.
GPIO5 interrupt.
(Trigger controlled by GP5 registers.)
Note: This bit is cleared once read.
GPIO4 interrupt.
(Trigger controlled by GP4 registers.)
Note: This bit is cleared once read.
GPIO3 interrupt.
(Trigger controlled by GP3 registers.)
Note: This bit is cleared once read.
GPIO2 interrupt.
(Trigger controlled by GP2 registers.)
Note: This bit is cleared once read.
GPIO1 interrupt.
(Trigger controlled by GP1 registers.)
Note: This bit is cleared once read.
GPIO0 interrupt.
(Trigger controlled by GP0 registers.)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Each bit in R38 enables or masks the
corresponding bit in R30. The default
value for these bits is 0 (unmasked).
DESCRIPTION
PD, March 2010, Rev 4.2
WM8351
203
Related parts for WM8351GEB/V
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![wm8351](/images/no-image3.png)
Part Number:
Description:
Wolfson Audioplus? Stereo Codec With Power Management
Manufacturer:
Wolfson Microelectronics plc
Datasheet:
![WM9712LEFL](/images/manufacturer_photos/0/7/716/wolfson_microelectronics_tmb.jpg)
Part Number:
Description:
Manufacturer:
Wolfson Microelectronics
Datasheet: