WM8351GEB/V Wolfson Microelectronics, WM8351GEB/V Datasheet - Page 179

• Manufacturer Part Number: WM8351GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8351GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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20.1.1
To configure a pin as a GPIO, the corresponding GPn_FN register bits must be set to 0000 (see
Table 124). Each GPIO pin can be set up as an input or as an output through the corresponding
GPn_DIR register bits. Note that, when changing GPn_DIR, it is recommended to set GPn_FN =
0000 first. See Section 20.2.2 for the recommended sequence of commands when updating the
GPIO pin function.
The state of a GPIO output is determined by writing to the corresponding GPn_LVL register bit. For
GPIO inputs, reading the GPn_LVL bit returns the logic level at the GPIO pin.
The polarity of GPIO inputs can be selected through the corresponding GPn_CFG bit. For GPIO
outputs, the GPn_CFG bit controls the electrical characteristics of the output pin.
GPIO inputs can also generate an interrupt (see Section 20.1.3). The GPn_INTMODE selects
whether an interrupt occurs on a rising edge only, or else on both rising and falling edges. The input
to this function is influenced by the polarity bit GPn_CFG described above.
R129 (81h)
GPIO pull-up
R130 (82h)
GPIO
pull-down
R131 (83h)
GPIO Interrupt
Mode
R134 (86h)
GPIO Pin
Configuration
R135 (87h)
GPIO Pin
Polarity / Type
R230 (E6h)
GPIO pin
status
Note: n is a number between 0 and 12 that identifies the individual GPIO.
Table 120 Configuring the GPIO Pins
ADDRESS
CONFIGURING GPIO PINS
12:0
12:0
12:0
12:0
12:0
12:0
BIT
GPn_PU [12:0]
GPn_PD [12:0]
GPn_INTMODE
[12:0]
GPn_DIR [12:0]
GPn_CFG
[12:0]
GPn_LVL [12:0]
LABEL
DEFAULT
Dependan
Dependan
Dependan
Dependan
CONFIG
CONFIG
CONFIG
CONFIG
settings
settings
settings
settings
t on
t on
t on
t on
N/A
0
GPIOn pull-up
0 = Normal
1 = Pull-up enabled
Only valid when GPIOn is set to input. Do
not select pull-up and pull-down at the
same time. (see note)
GPIOn pull-down
0 = Normal
1 = Pull-down enabled
Only valid when GPIOn is set to input. Do
not select pull-up and pull-down at the
same time. (see note)
GPIOn Pin Mode:
0 = GPIO interrupt is rising edge triggered
and taken after the effect of GPn_CFG
register bit
1 = GPIO interrupt is both rising and falling
edge triggered
GPIOn pin direction
0 = Output
1 = Input
Selects input polarity /output type for GPIOn
Input (GPn_DIR=1)
0 = active low
1 = active high
(see Note)
Logic level of GPIOn pin
Input (GPn_DIR=1)
Read GPn_LVL to
check logic level.
Writing ‘0’ clears
GPn_EINT
DESCRIPTION
PD, March 2010, Rev 4.2
Output
(GPn_DIR=0)
0 = CMOS
1 = open-drain
(see Note)
Output
(GPn_DIR=0)
Write to GPn_LVL
to change logic
level.
WM8351
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