TWR-S08MM128-KIT Freescale Semiconductor, TWR-S08MM128-KIT Datasheet - Page 33

• Manufacturer Part Number: TWR-S08MM128-KIT
• Description: MCU, MPU & DSP Development Tools For 9S08MM128 USB CAN
• Manufacturer: Freescale Semiconductor

Specifications of TWR-S08MM128-KIT

• Processor To Be Evaluated: 9S08MM128
• Data Bus Width: 8 bit
• Interface Type: USB, CAN
• Silicon Manufacturer: Freescale
• Core Architecture: Coldfire, HCS08
• Core Sub-architecture: Coldfire V1, HCS08
• Silicon Core Number: MCF51, MC9S08
• Silicon Family Name: Flexis - MCF51MM, Flexis - S08MM
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Freescale Semiconductor
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This should not exceed the maximum CPU frequency for this device which is 48 MHz.
This specification applies to any time the FLL reference source or reference divider is changed, trim value is changed,
DMX32 bit is changed, DRS bit is changed, or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE,
FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running.
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Internal reference startup time
Average internal reference frequency
DCO output frequency range —
trimmed
Resolution of trimmed DCO output fre-
quency at fixed voltage and tempera-
ture
Total deviation of trimmed DCO output
frequency over voltage and tempera-
ture
Acquisition time
Long term Jitter of DCO output clock (averaged over 2mS
interval)
VCO operating frequency
PLL reference frequency range
Jitter of PLL output clock measured
over 625ns
Lock frequency tolerance
Lock time
Loss of external clock minimum frequency - RANGE = 0
Loss of external clock minimum frequency - RANGE = 1
MCG and External Oscillator (XOSC) Characteristics
4
5
Table 18. MCG (Temperature Range = –40 to 105
Rating
factory trimmed at
VDD=3.0 V and
temp=25C
user trimmed
Low range
(DRS=00)
Mid range
(DRS=01)
High range
(DRS=10)
with FTRIM
without FTRIM
over voltage and
temperature
over fixed voltage
and temp range
of 0 – 70 C
FLL
PLL
Long term
Entry
Exit
FLL
PLL
7
2
3
6
1
f
f
pll_jitter_625
t
t
Symbol
pll_acquire
fll_acquire
f
t
f
f
t
loc_high
dco_res_t
C
f
pll_lock
loc_low
f
D
fll_lock
t
f
pll_ref
D
dco_t
int_ft
f
irefst
dco_t
Jitter
vco
ns
lock
unl
(16/5) x
1.49
4.47
(3/5) x
31.25
Min
f
f
7.0
1.0
int_t
int_t
16
32
40
—
—
—
—
—
—
—
—
—
—
—
—
°
C Ambient)
Typical
0.566
31.25
0.1
0.2
0.5
1.0
0.02
55
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4
1075(1/
1075(1/
t
t
pll_acquire+
fll_acquire+
39.0625
2.98
5.97
0.2
0.4
Max
55.0
100
0.2
2.0
2
1
—
20
40
60
—
—
—
1
1
f)
Electrical Characteristics
f
f
pll_re
int_t)
%f
%f
%f
MHz
MHz
MHz
Unit
%f
kHz
kHz
kHz
ms
s
%
s
dco
dco
dco
pll
C
D
C
C
C
C
C
C
C
C
C
D
C
D
D
D
D
D
D
D
D
D
P
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