S9S08DN32F1MLC Freescale Semiconductor, S9S08DN32F1MLC Datasheet - Page 178

IC MCU 8BIT 32KB FLASH 32LQFP

S9S08DN32F1MLC

Manufacturer Part Number
S9S08DN32F1MLC
Description
IC MCU 8BIT 32KB FLASH 32LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of S9S08DN32F1MLC

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Processor Series
S08D
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
26
Operating Supply Voltage
3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
Part Number:
S9S08DN32F1MLC
Manufacturer:
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Quantity:
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Part Number:
S9S08DN32F1MLC
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Chapter 10 Analog-to-Digital Converter (S08ADC12V1)
10.3.8
178
The pin control registers disable the I/O port control of MCU pins used as analog inputs. APCTL1 is
ADICLK
MODE
Field
3:2
1:0
Pin Control 1 Register (APCTL1)
Conversion Mode Selection. MODE bits are used to select between 12-, 10-, or 8-bit operation. See
Input Clock Select. ADICLK bits select the input clock source to generate the internal clock ADCK. See
Table
10-9.
Table 10-6. ADCCFG Register Field Descriptions (continued)
ADICLK
MODE
ADIV
00
01
10
11
00
01
10
11
00
01
10
11
8-bit conversion (N=8)
12-bit conversion (N=12)
10-bit conversion (N=10)
Reserved
Bus clock
Bus clock divided by 2
Alternate clock (ALTCLK)
Asynchronous clock (ADACK)
MC9S08DN60 Series Data Sheet, Rev 3
Table 10-7. Clock Divide Select
Table 10-8. Conversion Modes
Table 10-9. Input Clock Select
Divide Ratio
1
2
4
8
Selected Clock Source
Mode Description
Description
Input clock ÷ 2
Input clock ÷ 4
Input clock ÷ 8
Clock Rate
Input clock
Freescale Semiconductor
Table
10-8.

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