ATMEGA48PA-MNR Atmel, ATMEGA48PA-MNR Datasheet - Page 46

• Manufacturer Part Number: ATMEGA48PA-MNR
• Description: MCU AVR 4KB FLASH 20MHZ 28QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA48PA-MNR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, UART, I2C
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: ATMEGA48A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10. System Control and Reset
10.1
10.2
8161D–AVR–10/09
Resetting the AVR
Reset Sources
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. For the ATmega168PA, the instruction placed at the Reset Vector must
be a JMP – Absolute Jump – instruction to the reset handling routine. For the ATmega48PA and
ATmega88PA, the instruction placed at the Reset Vector must be an RJMP – Relative Jump –
instruction to the reset handling routine. If the program never enables an interrupt source, the
Interrupt Vectors are not used, and regular program code can be placed at these locations. This
is also the case if the Reset Vector is in the Application section while the Interrupt Vectors are in
the Boot section or vice versa (ATmega88PA/168PA only). The circuit diagram in
page 47
reset circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATmega48PA/88PA/168PA/328P has four sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer than
• Watchdog System Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown-out Reset. The MCU is reset when the supply voltage V
threshold (V
the minimum pulse length.
Watchdog System Reset mode is enabled.
threshold (V
shows the reset logic.
POT
BOT
).
) and the Brown-out Detector is enabled.
Table 28-3 on page 318
ATmega48PA/88PA/168PA/328P
”Clock Sources” on page
defines the electrical parameters of the
CC
is below the Brown-out Reset
27.
Figure 10-1 on
46